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PDF AD7989-5 Data sheet ( Hoja de datos )
| Número de pieza | AD7989-5 | |
| Descripción | 100 kSPS/500 kSPS PulSAR ADCs | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Data Sheet
18-Bit, 100 kSPS/500 kSPS
PulSAR ADCs in MSOP/LFCSP
AD7989-1/AD7989-5
FEATURES
GENERAL DESCRIPTION
Low power dissipation
AD7989-1
400 μW at 100 kSPS (VDD only)
700 μW at 100 kSPS (total)
AD7989-5
2 mW at 500 kSPS (VDD only)
3.5 mW at 500 kSPS (total)
18-bit resolution with no missing codes
Throughput: 100 kSPS (AD7989-1)/500 kSPS (AD7989-5)
INL: ±1 LSB typical, 2 LSB maximum
SNR: 98 dB at 1 kHz, VREF = 5 V
SINAD: 97 dB at 1 kHz
THD: −120 dB at 10 kHz
Dynamic range: 99 dB, VREF = 5 V
True differential analog input range: ±VREF
0 V to VREF with VREF between 2.4 V and 5.1 V
No pipeline delay
Single-supply 2.5 V operation with 1.8 V/2.5 V/3 V/5 V logic
interface
Proprietary serial interface: SPI-/QSPI™-/MICROWIRE™-/DSP-
compatible1
Ability to daisy-chain multiple ADCs
10-lead package: MSOP and 3 mm × 3 mm LFCSP
APPLICATIONS
Battery-powered equipment
Data acquisition systems
Medical instruments
Seismic data acquisition systems
The AD7989-1/AD7989-5 are 18-bit, successive approximation,
analog-to-digital converters (ADCs) that operate from a single
power supply, VDD. They contain a low power, high speed,
18-bit sampling ADC and a versatile serial interface port. On
the CNV rising edge, the AD7989-1/AD7989-5 sample the
voltage difference between the IN+ and IN− pins. The voltages
on these pins usually swing in opposite phases between 0 V and
VREF. The reference voltage, REF, is applied externally and can
be set independent of the supply voltage, VDD. Its power scales
linearly with throughput.
The AD7989-1/AD7989-5 are serial peripheral interface (SPI)
compatible, which features the ability, using the SDI input, to
daisy-chain several ADCs on a single 3-wire bus. It is compatible
with 1.8 V, 2.5 V, 3 V, and 5 V logic, using the separate VIO supply.
The AD7989-1/AD7989-5 are available in a 10-lead MSOP or a
10-lead LFCSP with operation specified from −40°C to +85°C.
Table 1. MSOP, LFCSP 14-/16-/18-Bit PulSAR® ADCs
Bits 100 kSPS 250 kSPS 400 kSPS to 500 kSPS ≥1000 kSPS
181 AD7989-12 AD76912 AD76902
AD79822
AD7989-52
AD79842
161 AD7684
AD76872 AD76882
163 AD7680
AD76852
AD76932
AD76862
AD79802
AD7683
AD7694 AD7988-52
AD79832
AD7988-12
143 AD7940
AD79422 AD79462
1 True differential.
2 Pin-for-pin compatible.
3 Pseudo differential.
TYPICAL APPLICATIONS CIRCUIT
2.5V TO 5V 2.5V
±10V, ±5V, ..
ADA4941-1
REF VDD VIO
IN+ SDI/CS
AD7989-1/ SCK
AD7989-5
IN–
SDO
GND CNV
Figure 1.
1.8V TO 5.5V
3- OR 4-WIRE
INTERFACE
(SPI, CS,
DAISY CHAIN)
1 Protected by U.S. Patent 6,703,961.
Rev. A
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
©2014 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
1 page  
Data Sheet
AD7989-1/AD7989-5
TIMING SPECIFICATIONS
TA = −40°C to +85°C, VDD = 2.37 V to 2.63 V, VIO = 2.3 V to 5.5 V, unless otherwise noted. See Figure 2 and Figure 3 for load conditions.
Table 4.
Parameter
AD7989-1
Throughput Rate
Conversion Time: CNV Rising Edge to Data Available
Acquisition Time
Time Between Conversions
AD7989-5
Throughput Rate
Conversion Time: CNV Rising Edge to Data Available
Acquisition Time
Time Between Conversions
CNV Pulse Width (CS Mode)
SCK Period (CS Mode)
VIO Above 4.5 V
VIO Above 3 V
VIO Above 2.7 V
VIO Above 2.3 V
SCK Period (Chain Mode)
VIO Above 4.5 V
VIO Above 3 V
VIO Above 2.7 V
VIO Above 2.3 V
SCK Low Time
SCK High Time
SCK Falling Edge to Data Remains Valid
SCK Falling Edge to Data Valid Delay
VIO Above 4.5 V
VIO Above 3 V
VIO Above 2.7 V
VIO Above 2.3 V
CNV or SDI Low to SDO D15 MSB Valid (CS Mode)
VIO Above 3 V
VIO Above 2.3V
CNV or SDI High or Last SCK Falling Edge to SDO High Impedance (CS Mode)
SDI Valid Setup Time from CNV Rising Edge (CS Mode)
SDI Valid Hold Time from CNV Rising Edge (CS Mode)
SCK Valid Setup Time from CNV Rising Edge (Chain Mode)
SCK Valid Hold Time from CNV Rising Edge (Chain Mode)
SDI Valid Setup Time from SCK Falling Edge (Chain Mode)
SDI Valid Hold Time from SCK Falling Edge (Chain Mode)
Symbol Min
tCONV
tACQ
tCYC
500
10
tCONV
tACQ
tCYC
tCNVH
tSCK
tSCK
tSCKL
tSCKH
tHSDO
tDSDO
400
2
500
10.5
12
13
15
11.5
13
14
16
4.5
4.5
3
tEN
tDIS
tSSDICNV
tHSDICNV
tSSCKCNV
tHSCKCNV
tSSDISCK
tHSDISCK
5
2
5
5
2
3
Typ Max Unit
100
9500
kSPS
ns
ns
µs
500
1600
kSPS
ns
ns
μs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
9.5 ns
11 ns
12 ns
14 ns
10 ns
15 ns
20 ns
ns
ns
ns
ns
ns
ns
Rev. A | Page 5 of 24
5 Page 
Data Sheet
0.7
IVDD
0.6
0.5
0.4
0.3
IREF
0.2
IVIO
0.1
0
2.375
2.425
2.475
2.525
2.575
2.625
VDD VOLTAGE (V)
Figure 18. Operating Currents vs. VDD Voltage (AD7989-5)
–80
–85
–90
–95
–100
–105
–110
–115
–120
–125
0.1
1 10 100
FREQUENCY (kHz)
Figure 19. THD vs. Frequency
1k
0.7
IVDD
0.6
0.5
0.4
0.3
IREF
0.2
IVIO
0.1
0
–55 –35 –15
5
25 45 65 85 105 125
TEMPERATURE (°C)
Figure 20. Operating Currents vs. Temperature (AD7989-5)
AD7989-1/AD7989-5
0.14
0.12
IVDD
0.10
0.08
0.06
0.04
0.02
IREF
IVIO
0
2.375
2.425
2.475
2.525
2.575
2.625
VDD VOLTAGE (V)
Figure 21. Operating Currents vs. VDD Voltage (AD7989-1)
8
7
6
5
4
3 IVDD + IVIO
2
1
0
–55 –35 –15
5 25 45 65
TEMPERATURE (°C)
85 105 125
Figure 22. Power-Down Currents vs. Temperature
0.14
0.12
IVDD
0.10
008
0.06
0.04
0.02
IREF
IVIO
0
–55 –35 –15
5
25 45 65 85 105 125
TEMPERATURE (°C)
Figure 23. Operating Currents vs. Temperature (AD7989-1)
Rev. A | Page 11 of 24
11 Page | ||
| Páginas | Total 24 Páginas | |
| PDF Descargar | [ Datasheet AD7989-5.PDF ] | |
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