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PDF BD37531FV Data sheet ( Hoja de datos )
| Número de pieza | BD37531FV | |
| Descripción | Sound Processor | |
| Fabricantes | ROHM Semiconductor | |
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Datasheet
Sound Processor with Built-in 3-band Equalizer
BD37531FV
General Description
BD37531FV is a sound processor with built-in 3-band
equalizer for car audio. A stereo input selector is
available that functions to switch single end input and
ground isolation input, input-gain control, main volume,
loudness and 5ch fader volume. Moreover, “Advanced
switch circuit”, which is an original ROHM technology,
can reduce various switching noise (ex. No-signal, low
frequency like 20Hz & large signal inputs). Also,
“Advanced switch” makes microcomputer control
easier and constructs a high quality car audio system.
Features
Reduced switching noise of input gain control,
mute, main volume, fader volume, bass, middle,
treble, loudness by using advanced switch circuit
Built-in differential input selector that can make
various combination of single-ended / differential
input.
Built-in ground isolation amplifier inputs, which is
ideal for external stereo input.
Built-in input gain controller reduces volume
switching noise of a portable audio input.
Decreased number of external components due to
built-in 3-band equalizer filter and loudness filter. It
is possible to freely control the Q, Gv, fo of the
3-band equalizer, and Gv of the loudness
through the I2C BUS control
A gain adjustment quantity of ±20dB with a 1 dB
step gain adjustment is possible for the bass,
middle and treble.
Equipped with terminals for the subwoofer outputs.
Also, the audio signal outputs of the front, rear and
subwoofer can be chosen using the I2C BUS
control.
Energy-saving design resulting in low current
consumption is achieved utilizing the BiCMOS
process. It has the advantage in quality over
scaling down the power heat control of the internal
regulators.
Input pins and output pins are organized and
separately laid out to keep the signal flow in one
direction which consequently, simplify pattern
layout of the set board and decrease the board
dimensions.
It is possible to control I2C BUS with 3.3V / 5V.
Key Specifications
Power Supply Voltage Range:
Circuit Current (No signal) :
Total Harmonic Distortion 1:
(FRONT,REAR)
Total Harmonic Distortion 2:
(SUBWOOFER)
Maximum Input voltage:
Cross-talk Between Selectors:
Volume Control Range:
Output Noise Voltage 1:
(FRONT,REAR)
Output Noise Voltage 2:
(SUBWOOFER)
Residual Output Noise Voltage:
Operating Temperature Range:
7.0V to 9.5V
38mA(Typ)
0.001%(Typ)
0.002%(Typ)
2.3Vrms (Typ)
-100dB (Typ)
+15dB to -79dB
3.8µVrms(Typ)
4.8µVrms(Typ)
1.8µVrms(Typ)
-40°C to +85°C
Package
W(Typ) x D(Typ) x H(Max)
SSOP-B28
10.0mm x 7.60mm x 1.35mm
Applications
It is optimal for car audio systems. It can also be used
for audio equipment of mini Compo, micro Compo, TV,
etc.
○Product structure：Silicon monolithic integrated circuit
www.rohm.com
© 2015 ROHM Co., Ltd. All rights reserved.
TSZ22111・14・001
○This product has no designed protection against radioactive rays
1/30
TSZ02201-0C2C0E100520-1-2
16.Dec.2015 Rev.001
1 page  
BD37531FV
Electrical Characteristics – continued
Parameter
Symbol
Limit
Min Typ Max
Unit
Conditions
Minimum Input Gain
Maximum Input Gain
Gain Set Error
Mute Attenuation＊
Maximum Gain
Maximum Attenuation *
Attenuation Set Error 1
Attenuation Set Error 2
Attenuation Set Error 3
Maximum Boost Gain
Maximum Cut Gain
Gain Set Error
Maximum Boost Gain
Maximum Cut Gain
Gain Set Error
Maximum Boost Gain
Maximum Cut Gain
Gain Set Error
Maximum Attenuation＊
Attenuation Set Error 1
Attenuation Set Error 2
Attenuation Set Error 3
Output Impedance
Maximum Output
Voltage
Maximum Gain
Input gain 0dB
GIN_MIN
-2
0
+2 dB VIN=100mVrms
GIN=20log(VOUT/VIN)
GIN_MAX +18 +20 +22
Input gain +20dB
dB VIN=100mVrms
GIN=20log(VOUT/VIN)
GIN_ERR
-2
0
+2 dB GAIN=+20dB to +1dB
Mute ON
GMUTE
－ -105 -85
dB GMUTE=20log(VOUT/VIN)
BW = IHF-A
Volume = 15dB
GV_MAX 13 15 17
dB VIN=100mVrms
Gv=20log(VOUT/VIN)
Volume = -∞dB
GV_MIN
－ -100 -85
dB Gv=20log(VOUT/VIN)
BW = IHF-A
GV_ERR1
-2
0
+2 dB GAIN & ATT=+15dB to -15dB
GV_ERR2
-3
0
+3 dB ATT=-16dB to -47dB
GV_ERR3
-4
0
+4 dB ATT=-48dB to -79dB
Gain=+20dB f=100Hz
GB_BST 18 20 22
dB VIN=100mVrms
GB=20log (VOUT/VIN)
Gain=-20dB f=100Hz
GB_CUT -22 -20 -18
dB VIN=2Vrms
GB=20log (VOUT/VIN)
GB_ERR
-2
0
+2
dB
Gain=+20dB to -20dB
f=100Hz
Gain=+20dB f=1kHz
GM_BST 18 20 22
dB VIN=100mVrms
GM=20log (VOUT/VIN)
Gain=-20dB f=1kHz
GM_CUT -22 -20 -18
dB VIN=2Vrms
GM=20log (VOUT/VIN)
GM_ERR
-2
0
+2 dB Gain=+20dB to -20dB f=1kHz
Gain=+20dB f=10kHz
GT_BST 18 20 22
dB VIN=100mVrms
GT=20log (VOUT/VIN)
Gain=-20dB f=10kHz
GT_CUT -22 -20 -18
dB VIN=2Vrms
GT=20log (VOUT/VIN)
GT_ERR
-2
0
+2
dB
Gain=+20dB to -20dB
f=10kHz
Fader = -∞dB
GF_MIN
－ -100 -90
dB GF=20log(VOUT/VIN)
BW = IHF-A
GF_ERR1
-2
0
+2 dB ATT=-1dB to -15dB
GF_ERR2
-3
0
+3 dB ATT=-16dB to -47dB
GF_ERR3
-4
0
+4 dB ATT=-48dB to -79dB
ROUT
－ － 50
Ω VIN=100mVrms
VOM
2
2.2
－
Vrms
THD+N=1％
BW=400Hz-30KHz
GL_MAX 17 20 23
Gain 20dB
dB VIN=100mVrms
GL=20log(VOUT/VIN)
Gain Set Error
GL_ERR
-2
0
+2 dB GAIN=+20dB to +1dB
VP-9690A(Average value detection, effective value display) filter by Matsushita Communication is used for * measurement.
Phase between input / output is same.
www.rohm.com
© 2015 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
5/30
TSZ02201-0C2C0E100520-1-2
16.Dec.2015 Rev.001
5 Page 
BD37531FV
Timing Chart
CONTROL SIGNAL SPECIFICATION
(1) Electrical Specifications and Timing for Bus Lines and I/O Stages
SDA
tBUF
tLOW
tR
SCL
tF
tHD;STAT
tSP
tHD;STA
tHD;DAT
PS
tHIGH
tSU;DAT tSU;STAT Sr
Figure 21. Definition of Timing on the I2C-bus
tSU;STOT
P
Table 1 Characteristics of the SDA and SCL bus lines for I2C-bus devices
(Unless specified particularly, Ta=25°C, VCC=8.5V)
Parameter
1 SCL clock frequency
2 Bus free time between a STOP and START condition
3 Hold time (repeated) START condition. After this period, the first clock
pulse is generated
4 LOW period of the SCL clock
5 HIGH period of the SCL clock
6 Set-up time for a repeated START condition
7 Data hold time:
8 Data set-up time
9 Set-up time for STOP condition
Symbol
fSCL
tBUF
tHD;STA
tLOW
tHIGH
tSU;STA
tHD;DAT
tSU;DAT
tSU;STO
Fast-mode I2C-bus
Min Max
0 400
1.3 －
0.6 －
1.3
0.6
0.6
0.06 (Note)
120
0.6
－
－
－
－
－
－
Unit
kHz
μS
μS
μS
μS
μS
μS
ns
μS
All values referred to VIH Min and VIL Max Levels (see Table 2).
(Note) The device must internally provide a hold time of at least 300 ns for the SDA signal (referred to the VIH Min of the SCL signal) in order to bridge the
undefined region of the falling edge of SCL.
About 7(tHD;DAT), 8(tSU;DAT), make the setup in which the margin is fully in .
Table 2 Characteristics of the SDA and SCL I/O stages for I2C-bus devices
Parameter
Symbol
10 LOW level input voltage:
VIL
11 HIGH level input voltage:
VIH
12 Pulse width of spikes which must be suppressed by the input filter.
tSP
13 LOW level output voltage: at 3mA sink current
VOL1
14 Input current each I/O pin with an input voltage between 0.4V and 4.5V.
II
ｔtHHDD;;SSTTAA
:：22µuss
ｔtHHDD;;DDAATT
:：11µus
ｔtSSUU;;DDAATT
:：11µuss
Fast-mode devices
Min Max
-0.3 +1
2.3 5
0 50
0 0.4
-10 +10
tｔSSUU;;SSTTOO
:2：2µuss
Unit
V
V
ns
V
μA
SSCCLL
SSDDA
tｔBBUUFF
:：44µuss
ｔtLLOOWW
:：33µuss
tｔHHIIGGHH
:：11µuss
SSCCLLcclolocckkfrfereqquueennccyy:：250kkHHzz
Figure 22. A Command Timing Example in the I2C Data Transmission
www.rohm.com
© 2015 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
11/30
TSZ02201-0C2C0E100520-1-2
16.Dec.2015 Rev.001
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet BD37531FV.PDF ] | |
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