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PDF AD7545A Data sheet ( Hoja de datos )
| Número de pieza | AD7545A | |
| Descripción | CMOS 12-Bit Buffered Multiplying DAC | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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FEATURES
Improved Version of AD7545
Fast Interface Timing
All Grades 12-Bit Accurate
20-Lead DIP and Surface Mount Packages
Low Cost
CMOS 12-Bit
Buffered Multiplying DAC
AD7545A
FUNCTIONAL BLOCK DIAGRAM
GENERAL DESCRIPTION
The AD7545A, a 12-bit CMOS multiplying DAC with internal
data latches, is an improved version of the industry standard
AD7545. This new design features a WR pulse width of 100 ns,
which allows interfacing to a much wider range of fast 8-bit and
16-bit microprocessors. It is loaded by a single 12-bit-wide word
under the control of the CS and WR inputs; tying these control
inputs low makes the input latches transparent, allowing unbuf-
fered operation of the DAC.
DIP/SOIC
PIN CONFIGURATIONS
LCCC
PLCC
REV. C
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2000
1 page  
AD7545A
CIRCUIT INFORMATION—D/A CONVERTER SECTION
Figure 1 shows a simplified circuit of the D/A converter section
of the AD7545A, and Figure 2 gives an approximate equivalent
circuit. Note that the ladder termination resistor is connected to
AGND. R is typically 15 kΩ.
The binary weighted currents are switched between the OUT1
bus line and AGND by N-channel switches, thus maintaining a
constant current in each ladder leg independent of the switch
state.
Figure 1. Simplified D/A Circuit of AD7545A
The capacitance at the OUT1 bus line, COUT1, is code-
dependent and varies from 70 pF (all switches to AGND) to
150 pF (all switches to OUT1).
One of the current switches is shown in Figure 2. The input
resistance at VREF (Figure 1) is always equal to R. Since RIN at
the VREF pin is constant, the reference terminal can be driven by
a reference voltage or a reference current, ac or dc, of positive or
negative polarity. (If a current source is used, a low temperature
coefficient external RFB is recommended to define scale factor.)
input buffers operate in their linear region and draw current
from the power supply. To minimize power supply currents it is
recommended that the digital input voltages be as close to the
supply rails (VDD and DGND) as is practically possible.
The AD7545A may be operated with any supply voltage in the
range 5 ≤ VDD ≤ 15 volts. With VDD = +15 V the input logic
levels are CMOS compatible only, i.e., 1.5 V and 13.5 V.
BASIC APPLICATIONS
Figures 4 and 5 show simple unipolar and bipolar circuits using
the AD7545A. Resistor R1 is used to trim for full scale. The L,
C, U grades have a guaranteed maximum gain error of ± 1 LSB
at +25°C, and in many applications it should be possible to
dispense with gain trim resistors altogether. Capacitor C1 pro-
vides phase compensation and helps prevent overshoot and
ringing when using high speed op amps. Note that all the cir-
cuits of Figures 4, 5 and 6 have constant input impedance at the
VREF terminal.
The circuit of Figure 4 can either be used as a fixed reference
D/A converter so that it provides an analog output voltage in the
range 0 to –VIN (note the inversion introduced by the op amp)
or VIN can be an ac signal in which case the circuit behaves as
an attenuator (2-Quadrant Multiplier). VIN can be any voltage
in the range –20 ≤ VIN ≤ +20 volts (provided the op amp can
handle such voltages) since VREF is permitted to exceed VDD.
Table II shows the code relationship for the circuit of Figure 4.
Figure 4. Unipolar Binary Operation
Figure 2. N-Channel Current Steering Switch
CIRCUIT INFORMATION—DIGITAL SECTION
Figure 3 shows the digital structure for one bit.
The digital signals CONTROL and CONTROL are generated
from CS and WR.
Table I. Recommended Trim Resistor Values vs. Grades
Trim Resistor K/B/T L/C/U
R1 200 Ω 100 Ω
R2 68 Ω 33 Ω
Table II. Unipolar Binary Code Table for Circuit of Figure 4
Binary Number in
DAC Register
Analog Output
1111 1111 1111
Figure 3. Digital Input Structure
The input buffers are simple CMOS inverters designed such
that when the AD7545A is operated with VDD = 5 V, the buffers
convert TTL input levels (2.4 V and 0.8 V) into CMOS logic
levels. When VIN is in the region of 2.0 volts to 3.5 volts, the
1000 0000
0000 0000
0000 0000
0000
0001
0000
4095
–VIN 4096
2048
–VIN 4096 = –1/2 VIN
1
–VIN 4096
0 Volts
–4– REV. C
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet AD7545A.PDF ] | |
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