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PDF AS5C2568 Data sheet ( Hoja de datos )
| Número de pieza | AS5C2568 | |
| Descripción | 32K x 8 SRAM | |
| Fabricantes | Micross | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de AS5C2568 (archivo pdf) en la parte inferior de esta página. Total 17 Páginas | ||
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32K x 8 SRAM
SRAM MEMORY ARRAY
AVAILABLE AS MILITARY
SPECIFICATIONS
•SMD 5962-88662
•SMD 5962-88552
•MIL-STD-883
FEATURES
• Access Times: 12, 15, 20, 25, 35, 45, 55, 70, & 100ns
• Battery Backup: 2V data retention
• Low power standby
• High-performance, low-power CMOS double-metal process
• Single +5V (+10%) Power Supply
• Easy memory expansion with CE\
• All inputs and outputs are TTL compatible
OPTIONS
• Timing
12ns access
15ns access
20ns access
25ns access
35ns access
45ns access
55ns access1
70ns access1
100ns access
MARKING
-12
-15
-20
-25
-35
-45
-55
-70
-100
• Package(s)2
Ceramic DIP (300 mil)
Ceramic DIP (600 mil)
Ceramic LCC (28 leads)
Ceramic LCC (32 leads)
Ceramic Flat Pack
Ceramic SOJ
C
CW
EC
ECW
F
DCJ
No. 108
No. 110
No. 204
No. 208
No. 302
No. 500
• Operating Temperature Ranges
Military -55oC to +125oC
Industrial -40oC to +85oC
XT
IT
• 2V data retention/low power
L
NOTES:
1. Electrical characteristics identical to those provided for the
45ns access devices.
2. Plastic SOJ (DJ Package) is available on the AS5C2568 datasheet.
For more products and information
please visit our web site at
www.micross.com
MT5C2568 / AS5C2568
Rev. 4.7 10/11
SRAM
MT5C2568
AS5C2568
PIN ASSIGNMENT
(Top View)
28-PIN SOJ (DCJ)
28-Pin DIP (C, CW)
32-Pin LCC (ECW)
A14 1
A12 2
A7 3
A6 4
A5 5
A4 6
A3 7
A2 8
A1 9
A0 10
DQ1 11
DQ2 12
DQ3 13
VSS 14
28 VCC
27 WE\
26 A13
25 A8
24 A9
23 A11
22 OE\
21 A10
20 CE\
19 DQ8
18 DQ7
17 DQ6
16 DQ5
15 DQ4
4 3 2 1 32 31 30
A6
A5
A4
A3
A2
A1
A0
NC
DQ1
5
6
7
8
9
10
11
12
13
29 A8
28 A9
27 A11
26 NC
25 OE\
24 A10
23 CE\
22 DQ8
21 DQ7
14 15 16 17 18 19 20
28-Pin LCC (EC)
28-Pin Flat Pack (F)
A14 1
A12 2
A7 3
A6 4
A5 5
A4 6
A3 7
A2 8
A1 9
A0 10
DQ1 11
DQ2 12
DQ3 13
VSS 14
28 VCC
27 WE\
26 A13
25 A8
24 A9
23 A11
22 OE\
21 A10
20 CE\
19 DQ8
18 DQ7
17 DQ6
16 DQ5
15 DQ4
3 2 1 28 27
A6
A5
A4
A3
A2
A1
A0
DQ1
DQ2
4
5
6
7
8
9
10
11
12
26 A13
25 A8
24 A9
23 A11
22 OE\
21 A10
20 CE\
19 DQ8
18 DQ7
13 14 15 16 17
GENERAL DESCRIPTION
The Micross Components SRAM family employs
high-speed, low power CMOS designs using a four-transistor
memory cell. These SRAMs are fabricated using double-layer
metal, double-layer polysilicon technology.
For flexibility in high-speed memory applications, Mi-
cross Components offers chip enable (CE\) and output enable
(OE\) capability. These enhancements can place the outputs in
High-Z for additional flexibility in system design.
Writing to these devices is accomplished when write
enable (WE\) and CE\ inputs are both LOW. Reading is
accomplished when WE\ remains HIGH and CE\ and OE\ go
LOW. The device offers a reduced power standby mode when
disabled. This allows system designs to achieve low standby
power requirements.
The “L” version provides a battery backup/low volt-
age data retention mode, offering 2mW maximum power dis-
sipation at 2 volts. All devices operate from a single +5V power
supply and all inputs and outputs are fully TTL compatible.
Micross Components reserves the right to change products or specifications without notice.
1
1 page  
AC TEST CONDITIONS
Input pulse levels...............................................Vss to 3V
Input rise and fall times..................................................5ns
Input timing reference level..........................................1.5V
Output reference level...................................................1.5V
Output load...............................................See figures 1 & 2
Q
255
SRAM
MT5C2568
AS5C2568
+5V +5V
480
Q
30 pF
255
480
5 pF
NOTES
1. All voltages referenced to VSS (GND).
2. -3V for pulse width < 20ns
3. ICC is dependent on output loading and cycle rates. The
specified value applies with the outputs unloaded, and
f = 1 Hz.
tRC (MIN)
4. This parameter is guaranteed but not tested.
5. Test conditions as specified with the output loading as
shown in Fig. 1 unless otherwise noted.
6. t HZCE, tHZOE and tHZWE are specified with CL =
5pF as in Fig. 2. Transition is measured ±500mV typical
from steady state voltage, allowing for actual tester RC time
constant.
Fig. 1
OUTPUT LOAD
EQUIVALENT
Fig. 2
OUTPUT LOAD
EQUIVALENT
7. At any given temperature and voltage condition, tHZCE
is less than tLZCE, and tHZWE is less than tLZWE.
8. WE\ is HIGH for READ cycle.
9. Device is continuously selected. Chip enables and
output enables are held in their active state.
10. Address valid prior to, or coincident with, latest
occurring chip enable.
11. tRC = Read Cycle Time.
12. Chip enable (CE\) and write enable (WE\) can initiate
and terminate a WRITE cycle.
DATA RETENTION ELECTRICAL CHARACTERISTICS (L Version Only)
DESCRIPTION
VCC for Retention Data
CONDITIONS
SYM
VDR
MIN
2
MAX
UNITS
V
Data Retention Current
CE\ > (VCC-0.2V)
VIN > (VCC-0.2V)
or < 0.2V
ICCDR
1 mA
Chip Deselect to Data
Retention Time
tCDR
0
-- ns
Operation Recovery Time
tR tRC
ns
NOTES
4
4, 11
VCC
CE\
VIH
VIL
MT5C2568 / AS5C2568
Rev. 4.7 10/11
LOW Vcc DATA RETENTION WAVEFORM
tCDR
DATA RETENTION MODE
4.5V
VDR > 2V
4.5V
tR
VDR
DON’T CARE
UNDEFINED
Micross Components reserves the right to change products or specifications without notice.
5
5 Page 
MECHANICAL DEFINITIONS*
SRAM
MT5C2568
AS5C2568
Micross Case #208 (Package Designator ECW)
SMD 5962-88662 & SMD 5962-88552, Case Outline Y
D1
B2
D2
L1
E3 E
E1
E2
e
D
hx45o
A1
D3
B1
A
L
SYMBOL
A
A1
B1
B2
D
D1
D2
D3
E
E1
E2
E3
e
h
L
L1
SMD SPECIFICATIONS
MIN
0.060
MAX
0.120
0.050
0.088
0.022
0.028
0.072 REF
0.442
0.458
0.300 BSC
0.150 BSC
--- 0.458
0.540
0.560
0.400 BSC
0.200 BSC
--- 0.558
0.050 BSC
0.045
0.040 REF
0.055
0.075
0.095
NOTE: These dimensions are per the SMD. Micross’ package dimensional limits
may differ, but they will be within the SMD limits.
* All measurements are in inches.
MT5C2568 / AS5C2568
Rev. 4.7 10/11
11
Micross Components reserves the right to change products or specifications without notice.
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet AS5C2568.PDF ] | |
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