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PDF HV9982 Data sheet ( Hoja de datos )
| Número de pieza | HV9982 | |
| Descripción | LED Drive IC | |
| Fabricantes | Microchip | |
| Logotipo |  |
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HV9982
Three-Channel, Closed-Loop, Switch Mode
LED Drive IC
Features
• Switch mode controller for single-switch convert-
ers
• Closed loop control of output current
- Buck
- Boost
- SEPIC
• High PWM dimming ratio
• Internal 40V linear regulator
• Constant frequency operation
• Programmable slope compensation
• Linear and PWM dimming
• +0.2A/-0.4A gate drives for the switching FETs
• Output short circuit protection
• Output over voltage protection
• Hiccup-mode protection
• Analog control of PWM dimming
Applications
• RGB backlight applications
• Multiple string, white-LED driver applications
Description
HV9982 is a three-channel, closed loop, peak-current
mode PWM controller designed to drive a constant out-
put current. It can be used for driving either RGB LEDs
or multiple channels of white LEDs.
HV9982 includes a 40V linear regulator which provides
an 8.0V supply to power the IC. The switching frequen-
cies of the three converters are controlled by an exter-
nal clock signal. The channels operate at a switching
frequency of 1/12th of the external clock frequency and
are positioned 120° out-of-phase to reduce the input
current ripple. Each converter is driven by a peak cur-
rent mode controller with output current feedback.
The three output currents can be individually dimmed
using either linear or PWM dimming. The IC also
includes three disconnect FET drivers, which enable
high PWM-dimming ratios and also help to disconnect
the input in case of an output short-circuit condition.
HV9982 includes a Hiccup-mode protection for both
open LED and short-circuit condition with automatic
recovery when the fault clears.
2014 Microchip Technology Inc.
DS20005295B-page 1
1 page  
HV9982
TABLE 1-1: ELECTRICAL CHARACTERISTICS (CONTINUED) (SHEET 2 OF 3)1
Symbol Parameter
Note Min Typ Max Units Conditions
Over-voltage Protection (OVP1, OVP2 and OVP3)
VOVP,rising Over voltage rising trip point
VOVP,HYST Over voltage hysteresis
Current Sense (CS1, CS2 and CS3)
1
-
4.5 5.0 5.5
- 0.5 -
V OVP rising
V OVP falling
TBLANK
TDELAY
Leading edge blanking
Delay to output of gate
RDIS
Discharge resistance for
slope compensation
1 100 - 250 ns ---
1 - - 200 ns 100mV overdrive to the current
sense
1 - - 650 Ω Gate = Low
Internal Transconductance Opamp (Gm1, Gm2 and Gm3)
GB Gain bandwidth product
2-
AV Open loop DC gain
- 65
VCM Input common-mode range 2 -0.3
VO Output voltage range
2 0.7
Gm Transconductance
- 500
VOFFSET Input offset voltage
- -5.0
IBIAS
Input bias current
2-
Oscillator (CLOCK)
1.0
-
-
-
600
-
0.5
- MHz 75pF capacitance at COMP pin
- dB Output open
3.0 V ---
VDD V ---
700 μA/V ---
5.0 mV ---
1.0 nA ---
fOSC1
KSW
Phi1
Oscillator frequency
Oscillator divider ratio
GATE1 - GATE2 phase
delay
Phi1
GATE1 - GATE3 phase
delay
TOFF
TON
VCLOCK,HI
VCLOCK,LO
CLOCK low time
CLOCK high time
CLOCK input high
CLOCK input low
Disconnect Driver (FLT1, FLT2 and FLT3)
-
2
2
2
2
2
1
1
- 500 - kHz FCLOCK = 6.0MHz
- 12 -
- ---
- 120 -
° ---
- 240 -
° ---
50 -
- ns ---
50 -
- ns ---
2.0 - - V ---
- - 0.8 V ---
TRISE,FAULT Fault output rise time
TFALL,FAULT Fault output fall time
- - - 450 ns 330pF capacitor at FAULT pin
- - - 200 ns 330pF capacitor at FAULT pin
Short Circuit Protection (all three channels)
TBLANK,SC
GSC
Vomin
TOFF
Blanking time
Gain for short circuit com-
parator
Minimum current limit
threshold
Propagation time for short
circuit detection
1 400 - 700 ns ---
- 1.85 2.00 2.15 - ---
2 0.15 - 0.25 V REF = GND
- - - 250 ns FDBK = 2 • REF + 0.1V
HICCUP timer
IHC,SOURCE Current source at SKIP pin used
for hiccup mode protection
-
- 10 - μA ---
Note 1: Applies over the full operating ambient temperature range of 0°C < TA < +85°C.
2: For design guidance only.
2014 Microchip Technology Inc.
DS20005295B-page 5
5 Page 
When S1 is high and the HV9982 is operating in the
analog control of PWM dimming mode, the PWM dim-
ming frequency is set by a capacitor connected at the
RAMP pin. The RAMP frequency range is 100Hz-
1.0kHz and the capacitor can be selected as:
fHZ = -C1----.R-0--A---M---s-P-
Note:
In the following description of the PWM-
dimming performance the PWMD signals
refer to the internal PWM dimming signal
and not to the signal applied at the PWMD
pins
When the PWM signal is high, the GATE and FLT pins
are enabled and the output of the transconductance
op-amp is connected to the external compensation net-
work. Thus, the internal amplifier controls the output
current. When the PWMD signal goes low, the output of
the transconductance amplifier is disconnected from
the compensation network. Thus, the integrating
capacitor maintains the voltage across it. The GATE is
disabled, so the converter stops switching and the FLT
pin goes low, turning off the disconnect switch.
The output capacitor of the converter determines the
PWM-dimming response of the converter, because it is
charged and discharged whenever the PWMD signal
goes high or low. In the case of a buck converter, since
the inductor current is continuous, a very small capaci-
tor is used across the LEDs. This minimizes the effect
of the capacitor on the PWM-dimming response of the
converter. However, in the case of a boost converter,
the output current is discontinuous and a very large
output capacitor is required to reduce the ripple in the
LED current. Thus, this capacitor will have a significant
impact on the PWM-dimming response. By turning off
the disconnect switch when PWMD goes low, the out-
put capacitor is prevented from being discharged and
thus the PWM-dimming response of the boost con-
verter Improves dramatically.
Disconnecting the LED load during PWM dimming
causes the energy stored in the inductor to be dumped
into the output capacitor. The filter capacitor should be
chosen large enough so that it can absorb the inductor
energy without significant change to the voltage across it.
3.9 Fault Conditions
The HV9982 is a robust controller which can protect the
LEDs and the LED driver in case of fault conditions.
The HV9982 includes both open LED protection and
output short circuit protection. In both cases, the
HV9982 shuts down and attempts a restart. The hiccup
time can be programmed by a single external capacitor
at the SKIP pin.
During start-up, or when a fault condition is detected,
both GATE and FLT outputs are disabled, the COMP
pins and SKIP pins are pulled to GND. Once the volt-
2014 Microchip Technology Inc.
HV9982
age at the SKIP pin falls below 0.1V and the fault con-
dition(s) have disappeared, the capacitor at the SKIP
pin is released and is charged slowly by a 10μA current
source. When the capacitor is charged to 5.0V, the
COMP pins are released and GATE and FLT pins are
allowed to turn on. If the hiccup time is long enough, it
will ensure that the compensation networks are all
completely discharged and that the converters start at
minimum duty cycle.
The hiccup timing capacitor can be programmed as:
CRAMP = 1----0-------A---4---.--9--t--VH---I--C---C---U---P-
3.10 Short Circuit Protection
When a short circuit condition is detected (output cur-
rent becomes higher than twice the steady state cur-
rent), the GATE and FLT outputs are pulled low. As
soon as the disconnect FET is turned off, the output
current goes to zero and the short circuit condition dis-
appears. At this time, the hiccup timer is started (Fig.
3). Once the timing is complete, the converter attempts
to restart. If the fault condition still persists, the con-
verter shuts down and goes through the cycle again. If
the fault condition is cleared, due to a momentary out-
put short, the converter will start regulating the output
current normally. This allows the LED driver to recover
from accidental shorts without having to reset the IC.
During short circuit conditions, there are two conditions
that determine the hiccup time.
The first condition is the time required to discharge the
compensation capacitors. Assuming a pole-zero R-C
network at the COMP pin (series combination of RZ
and CZ in parallel with CC),
tCOMP n = 3 RZn CZn
where n refers to the channel number.
If the compensation networks are only type 1 (single
capacitor), then:
tCOMP n = 3 650 CZn
Thus, the maximum compensation time required can
be computed as:
tCOMP max = maxtCOMP1,tCOMP2,tCOMP3
The second condition is the time required for the induc-
tors to completely discharge following a short circuit.
This time can be computed as:
tIND N= 4-- LN CON
DS20005295B-page 11
11 Page | ||
| Páginas | Total 22 Páginas | |
| PDF Descargar | [ Datasheet HV9982.PDF ] | |
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