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PDF TLE7233EM Data sheet ( Hoja de datos )
| Número de pieza | TLE7233EM | |
| Descripción | SPI Driver for Enhanced Relay Control | |
| Fabricantes | Infineon | |
| Logotipo |  |
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Data Sheet, Rev. 1.2, May 2014
TLE7233EM
SPIDER - 4 channel low-side driver with limp home
Automotive Power
1 page  
2 Block Diagram
RST
IN0
IN1
IN2
IN3
LHI
CS
SCLK
SI
SO
VDD
input logic
input register
SPI
diagnosis register
VDDA
control,
diagnostic
and
protective
functions
Figure 1 Block Diagram TLE7233EM
SPI Driver for Enhanced Relay Control
SPIDER - TLE7233EM
Block Diagram
temperature
sensor
short circuit
detection
gate
control
open load
detection
OUT0
OUT1
OUT2
OUT3
GND
Overview_EM.emf
Data Sheet
5 Rev. 1.2, 2014-05-09
5 Page 
SPI Driver for Enhanced Relay Control
SPIDER - TLE7233EM
General Product Characteristics
4.3 Thermal Resistance
Note: This thermal data was generated in accordance with JEDEC JESD51 standards.
For more information, go to www.jedec.org.
Pos. Parameter
Symbol
Limit Values
Unit Conditions
Min. Typ. Max.
4.3.6
4.3.7
4.3.8
4.3.9
Junction to Case, bottom
Junction to Case, top
Junction to Pin (6,7,18 or 19)
Junction to Ambient
(1s0p, min. footprint)
RthJC,back
RthJC,top
RthJPin
RthJA,min
–
–
–
–
– 4 K/W – 1) 2)
– 35 K/W – 1) 2)
– 15 K/W – 1) 2)
95 –
K/W – 1) 3)
4.3.10 Junction to Ambient
(1s0p + 300mm2 Cu)
RthJA,300 –
52 –
K/W – 1) 4)
4.3.11 Junction to Ambient
(1s0p + 600mm2 Cu)
RthJA,600 –
45 –
K/W – 1) 5)
4.3.12 Junction to Ambient (2s2p)
RthJA,2s2p –
1) Not test subject to production test, specified by design
33 –
K/W – 1) 6)
2) Specified RthJC value is simulated at natural convection on a cold plate setup (all pins are fixed to ambient temperature).
TA = 85 °C. Ch0 to Ch3 are dissipating 1 W power (0.25 W each).
3) Specified RthJA value is according to JEDEC JESD51-2,-3 at natural convection on FR4 1s0p board; The product
(Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with minimal footprint copper area and 70 µm thickness.
TA = 85 °C. Ch0 to Ch3 are dissipating 1 W power (0.25 W each).
4) Specified RthJA value is according to JEDEC JESD51-2,-3 at natural convection on FR4 1s0p board; The product
(Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with additional heatspreading copper area of 300 mm2
and 70 µm thickness. TA = 85 °C. Ch0 to Ch3 are dissipating 1 W power (0.25 W each).
5) Specified RthJA value is according to JEDEC JESD51-2,-3 at natural convection on FR4 1s0p board; The product
(Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with additional heatspreading copper area of 600 mm2
and 70 µm thickness. TA = 85°C. Ch0 to Ch3 are dissipating 1 W power (0.25 W each).
6) Specified RthJA value is according to JEDEC JESD51-2,-7 at natural convection on FR4 2s2p board; The product
(Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70 µm Cu, 2 x 35 µm Cu).
TA = 85°C. Ch0 to Ch3 are dissipating 1 W power (0.25 W each).
Data Sheet
11 Rev. 1.2, 2014-05-09
11 Page | ||
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| PDF Descargar | [ Datasheet TLE7233EM.PDF ] | |
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