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FDMS7580 데이터시트 PDF




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부품번호 FDMS7580 기능
기능 MOSFET ( Transistor )
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FDMS7580 데이터시트, 핀배열, 회로
October 2014
FDMS7580
N-Channel Power Trench® MOSFET
25 V, 7.5 m
Features
General Description
„ Max rDS(on) = 7.5 mat VGS = 10 V, ID = 15 A
„ Max rDS(on) = 11.1 mat VGS = 4.5 V, ID = 12 A
„ Advanced Package and Silicon combination for low rDS(on)
and high efficiency
„ Next generation enhanced body diode technology, engineered
for soft recovery
„ MSL1 robust package design
This N-Channel MOSFET has been designed specifically to
improve the overall efficiency and to minimize switch node
ringing of DC/DC converters using either synchronous or
conventional switching PWM controllers. It has been optimized
for low gate charge, low rDS(on), fast switching speed and body
diode reverse recovery performance.
Applications
„ Control MOSFET for Synchronous Buck Converters
„ 100% UIL tested
„ Notebook
„ RoHS Compliant
„ Server
„ Telecomm
„ High Efficiency DC-DC Switch Mode Power Supplies
Top Bottom
Pin 1
S
S
S
G
D5
D6
Power 56
D
D
DD
D7
D8
4G
3S
2S
1S
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
VGS
ID
EAS
PD
TJ, TSTG
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous (Package limited)
-Continuous (Silicon limited)
-Continuous
-Pulsed
TC = 25 °C
TC = 25 °C
TA = 25 °C
Single Pulse Avalanche Energy
Power Dissipation
TC = 25 °C
Power Dissipation
TA = 25 °C
Operating and Storage Junction Temperature Range
Thermal Characteristics
(Note 4)
(Note 1a)
(Note 3)
(Note 1a)
Ratings
25
±20
28
49
15
60
32
27
2.5
-55 to +150
Units
V
V
A
mJ
W
°C
RθJC
RθJA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
Package Marking and Ordering Information
(Note 1a)
4.6
50
°C/W
Device Marking
FDMS7580
Device
FDMS7580
Package
Power 56
Reel Size
13 ’’
Tape Width
12 mm
Quantity
3000 units
©2009 Fairchild Semiconductor Corporation
FDMS7580 Rev.C1
1
www.fairchildsemi.com




FDMS7580 pdf, 반도체, 판매, 대치품
Typical Characteristics TJ = 25 °C unless otherwise noted
10
ID = 15 A
8
6
VDD = 13 V
VDD = 10 V
VDD = 16 V
4
2
0
0 2 4 6 8 10 12 14
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics
2000
1000
Ciss
Coss
100
f = 1 MHz
VGS = 0 V
Crss
20
0.1 1 10
VDS, DRAIN TO SOURCE VOLTAGE (V)
30
Figure8. Capacitance vs Drain
to Source Voltage
20
10
TJ = 25 oC
TJ = 100 oC
TJ = 125 oC
1
0.01
0.1 1
tAV, TIME IN AVALANCHE (ms)
10
Figure9. Unclamped Inductive
Switching Capability
30
50
VGS = 10 V
40
VGS = 4.5 V
30
20
Limited by Package
10
RθJC = 4.6 oC/W
0
25 50 75 100 125
Tc, CASE TEMPERATURE (oC)
Figure 10. Maximum Continuous Drain
Current vs Case Temperature
150
100
10 100 µs
1 THIS AREA IS
LIMITED BY rDS(on)
0.1
0.01
0.01
SINGLE PULSE
TJ = MAX RATED
RθJA = 125 oC/W
TA = 25 oC
0.1 1
10
VDS, DRAIN to SOURCE VOLTAGE (V)
1 ms
10 ms
100 ms
1s
10 s
DC
100
Figure 11. Forward Bias Safe
Operating Area
1000
100
VGS = 10 V
SINGLE PULSE
RθJA = 125 oC/W
TA = 25 oC
10
1
0.5
10-4 10-3 10-2 10-1
1
10
t, PULSE WIDTH (sec)
100 1000
Figure 12. Single Pulse Maximum
Power Dissipation
FDMS7580 Rev.C1
4 www.fairchildsemi.com

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FDMS7580 전자부품, 판매, 대치품
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