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FDMS8320L 데이터시트 PDF




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FDMS8320L 데이터시트, 핀배열, 회로
March 2016
FDMS8320L
N-Channel PowerTrench® MOSFET
40 V, 248 A, 1.1 mΩ
Features
„ Max rDS(on) = 1.1 mΩ at VGS = 10 V, ID = 32 A
„ Max rDS(on) = 1.5 mΩ at VGS = 4.5 V, ID = 27 A
„ Advanced Package and Silicon combination for low rDS(on)
and high efficiency
„ Next generation enhanced body diode technology,
engineered for soft recovery
„ MSL1 robust package design
„ 100% UIL tested
„ RoHS Compliant
General Description
This N-Channel MOSFET has been designed specifically to
improve the overall efficiency and to minimize switch node
ringing of DC/DC converters using either synchronous or
conventional switching PWM controllers.It has been optimized
for low gate charge, low rDS(on), fast switching speed ang body
diode reverse recovery performance.
Applications
„ OringFET / Load Switching
„ Synchronous Rectification
„ DC-DC Conversion
Top
Pin 1
Bottom
Pin 1
S
S
S
G
S
S
D
D
Power 56
D
D
D
D
SD
GD
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted.
Symbol
VDS
VGS
ID
EAS
PD
TJ, TSTG
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous
-Continuous
-Continuous
-Pulsed
TC = 25 °C
TC = 100 °C
TA = 25 °C
Single Pulse Avalanche Energy
Power Dissipation
TC = 25 °C
Power Dissipation
TA = 25 °C
Operating and Storage Junction Temperature Range
Thermal Characteristics
(Note 5)
(Note 5)
(Note 1a)
(Note 4)
(Note 3)
(Note 1a)
Ratings
40
±20
248
157
36
943
264
104
2.5
-55 to +150
Units
V
V
A
mJ
W
°C
RθJC
RθJA
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient
Package Marking and Ordering Information
(Note 1a)
1.2
50
°C/W
Device Marking
FDMS8320L
Device
FDMS8320L
Package
Power 56
Reel Size
13 ’’
Tape Width
12 mm
Quantity
3000 units
©2012 Fairchild Semiconductor Corporation
FDMS8320L Rev.1.2
1
www.fairchildsemi.com




FDMS8320L pdf, 반도체, 판매, 대치품
Typical Characteristics TJ = 25 °C unless otherwise noted.
10
ID = 32 A
8
6
4
VDD = 20 V
VDD = 16 V
VDD = 24 V
2
0
0 25 50 75 100 125
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics
200
100
TJ = 25 oC
TJ = 100 oC
10
TJ = 125 oC
1
0.01
0.1 1 10 100
tAV, TIME IN AVALANCHE (ms)
Figure9. UnclampedInductive
Switching Capability
1000
2000
1000
100 10 us
THIS AREA IS
10 LIMITED BY rDS(on)
100 us
SINGLE PULSE
1 TJ = MAX RATED
RθJC = 1.2 oC/W
TC = 25 oC
0.1
0.1
1
CURVE BENT TO
MEASURE DATA
10
1 ms
10 ms
DC
100 200
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 11. Forward Bias Safe
Operating Area
30000
10000
1000
Ciss
Coss
100
f = 1 MHz
VGS = 0 V
10
0.1 1 10
VDS, DRAIN TO SOURCE VOLTAGE (V)
Crss
40
Figure8. Capacitancevs.Drain
to Source Voltage
250
200
VGS = 10 V
150
VGS = 4.5 V
100
50
0
25
RθJC = 1.2 oC/W
50 75 100 125
TC, CASE TEMPERATURE (oC)
150
Figure 10. Maximum Continuous Drain
Current vs. Case Temperature
20000
10000
SINGLE PULSE
RθJC = 1.2 oC/W
TC = 25 oC
1000
100
50
10-5
10-4
10-3
10-2
t, PULSE WIDTH (sec)
10-1
Figure 12. Single Pulse Maximum
Power Dissipation
1
FDMS8320L Rev.1.2
4 www.fairchildsemi.com

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FDMS8320L 전자부품, 판매, 대치품
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