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FDMS86202ET120 데이터시트 PDF




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부품번호 FDMS86202ET120 기능
기능 MOSFET ( Transistor )
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FDMS86202ET120 데이터시트, 핀배열, 회로
January 2015
FDMS86202ET120
N-Channel Shielded Gate PowerTrench® MOSFET
120 V, 102 A, 7.2 mΩ
Features
„ Extended TJ rating to 175°C
„ Shielded Gate MOSFET Technology
„ Max rDS(on) = 7.2 mΩ at VGS = 10 V, ID = 13.5 A
„ Max rDS(on) = 10.3 mΩ at VGS = 6 V, ID = 11.5 A
„ Advanced Package and Silicon combination for low rDS(on)
and high efficiency
„ MSL1 robust package design
„ 100% UIL tested
„ RoHS Compliant
General Description
This N-Channel MOSFET is produced using Fairchild
Semiconductor’s advanced PowerTrench® process that
incorporates Shielded Gate technology. This process has been
optimized for the on-state resistance and yet maintain superior
switching performance.
Application
„ DC-DC Conversion
Top
Pin 1
Bottom
S Pin 1
S
S
G
D
D
D
D
Power 56
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
VGS
ID
EAS
PD
TJ, TSTG
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous
-Continuous
-Continuous
-Pulsed
TC = 25 °C
TC = 100 °C
TA = 25 °C
Single Pulse Avalanche Energy
Power Dissipation
TC = 25 °C
Power Dissipation
TA = 25 °C
Operating and Storage Junction Temperature Range
S
S
S
G
(Note 5)
(Note 5)
(Note 1a)
(Note 4)
(Note 3)
(Note 1a)
D
D
D
D
Ratings
120
±20
102
72
13.5
538
600
187
3.3
-55 to +175
Units
V
V
A
mJ
W
°C
Thermal Characteristics
RθJC
RθJA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
Package Marking and Ordering Information
Device Marking
FDMS86202ET
Device
FDMS86202ET120
Package
Power 56
©2015 Fairchild Semiconductor Corporation
FDMS86202ET120 Rev. C1
1
(Note 1a)
0.8
45
°C/W
Reel Size
13 ’’
Tape Width
12 mm
Quantity
3000 units
www.fairchildsemi.com




FDMS86202ET120 pdf, 반도체, 판매, 대치품
Typical Characteristics TJ = 25 °C unless otherwise noted
10
ID = 13.5 A
8
6
4
VDD = 35 V
VDD = 60 V
VDD = 85 V
2
0
0 10 20 30 40 50
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics
100
10000
1000
100
Ciss
Coss
10 Crss
f = 1 MHz
VGS = 0 V
1
0.1 1 10
VDS, DRAIN TO SOURCE VOLTAGE (V)
100
Figure8. CapacitancevsDrain
to Source Voltage
120
TJ = 25 oC
10
TJ = 100 oC
1
0.01
TJ = 150 oC
0.1 1 10 100
tAV, TIME IN AVALANCHE (ms)
1000
Figure9. UnclampedInductive
Switching Capability
1000
100
10 us
10 THIS AREA IS
LIMITED BY rDS(on)
SINGLE PULSE
1 TJ = MAX RATED
RθJC = 0.8 oC/W CURVE BENT TO
TC = 25 oC
MEASURED DATA
0.1
0.1 1 10
100 us
1 ms
10 ms
DC
100 40
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 11. Forward Bias Safe
Operating Area
90
VGS = 10 V
60
VGS = 6 V
30
RθJC = 0.8 oC/W
0
25 50 75 100 125 150
TC, CASE TEMPERATURE (oC)
175
Figure 10. Maximum Continuous Drain
Current vs Case Temperature
100000
10000
SINGLE PULSE
RθJC = 0.8 oC/W
TC = 25 oC
1000
100
10-5
10-4
10-3
10-2
t, PULSE WIDTH (sec)
10-1
Figure 12. Single Pulse Maximum
Power Dissipation
1
©2015 Fairchild Semiconductor Corporation
FDMS86202ET120 Rev. C1
4
www.fairchildsemi.com

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FDMS86202ET120 전자부품, 판매, 대치품
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