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A4S12D40FTP 데이터시트 PDF




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부품번호 A4S12D40FTP 기능
기능 512Mb DDR SDRAM
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A4S12D40FTP 데이터시트, 핀배열, 회로
A4S12D30FTP
A4S12D40FTP
512M Double Data Rate Synchronous DRAM
512Mb DDR SDRAM Specification
A4S12D30FTP
A4S12D40FTP
Zentel Electronics Corp.
Revision 1.2
May, 2011




A4S12D40FTP pdf, 반도체, 판매, 대치품
BLOCK DIAGRAM
A4S12D40FTP
DLL
A4S12D30FTP
A4S12D40FTP
512M Double Data Rate Synchronous DRAM
DQ0 - 15
UDQS,LDQS
I/O Buffer
DQS Buffer
Memory
Array
Bank #0
Memory
Array
Bank #1
Memory
Array
Bank #2
Memory
Array
Bank #3
Mode Register
Control Circuitry
Address Buffer
A0-12 BA0,1
Clock Buffer
Control Signal Buffer
/CS /RAS /CAS /WE LDM
CLK /CLK CKE
UDM
Type Designation Code
This rule is applied to only Synchronous DRAM family.
A 4 S 12 D 4 0 F T P –G5
Speed Grade 5: 200MHz @CL=3.0
Package Type TP: TSOP(II)
Process Generation
Function Reserved for Future Use
Organization 2 n 3: x8, 4: x16
DDR Synchronous DRAM
Density 12: 512M bits
Interface S:SSTL _2
Memory Style (DRAM)
Zentel DRAM
Revision 1.2
Page 3 / 37
May, 2011

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A4S12D40FTP 전자부품, 판매, 대치품
A4S12D30FTP
A4S12D40FTP
512M Double Data Rate Synchronous DRAM
BASIC FUNCTIONS
The 512Mb DDR SDRAM provides basic functions, bank (row) activate, burst read / write, bank
(row) precharge, and auto / self refresh. Each command is defined by control signals of /RAS,
/CAS and /WE at CLK rising edge. In addition to 3 signals, /CS ,CKE and A10 are used as chip
select, refresh option, and precharge option, respectively. To know the detailed definition of
commands, please see the command truth table.
/CLK
CLK
/CS
Chip Select : L=select, H=deselect
/RAS
Command
/CAS
Command
define basic commands
/WE
Command
CKE
Refresh Option @refresh command
A10 Precharge Option @precharge or read/write command
Activate (ACT) [/RAS =L, /CAS =/WE =H]
ACT command activates a row in an idle bank indicated by BA.
Read (READ) [/RAS =H, /CAS =L, /WE =H]
READ command starts burst read from the active bank indicated by BA. First output data appears after
/CAS latency. When A10 =H at this command, the bank is deactivated after the burst read (auto-
precharge, READA)
Write (WRITE) [/RAS =H, /CAS =/WE =L]
WRITE command starts burst write to the active bank indicated by BA. Total data length to be written
is set by burst length. When A10 =H at this command, the bank is deactivated after the burst write
(auto-precharge, WRITEA)
Precharge (PRE) [/RAS =L, /CAS =H, /WE =L]
PRE command deactivates the active bank indicated by BA. This command also terminates burst read
/write operation. When A10 =H at this command, all banks are deactivated (precharge all, PREA ).
Auto-Refresh (REFA) [/RAS =/CAS =L, /WE =CKE =H]
REFA command starts auto-refresh cycle. Refresh address including bank address are generated
internally. After this command, the banks are precharged automatically.
Revision 1.2
Page 6 / 37
May, 2011

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A4S12D40FTP

512Mb DDR SDRAM

Zentel Electronics
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