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PDF FDS8858CZ Data sheet ( Hoja de datos )
| Número de pieza | FDS8858CZ | |
| Descripción | MOSFET ( Transistor ) | |
| Fabricantes | Fairchild Semiconductor | |
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FDS8858CZ
Dual N & P-Channel PowerTrench® MOSFET
N-Channel: 30V, 8.6A, 17.0mΩ P-Channel: -30V, -7.3A, 20.5mΩ
October 2011
Features
Q1: N-Channel
Max rDS(on) = 17mΩ at VGS = 10V, ID = 8.6A
Max rDS(on) = 20mΩ at VGS = 4.5V, ID = 7.3A
Q2: P-Channel
Max rDS(on) = 20.5mΩ at VGS = -10V, ID = -7.3A
Max rDS(on) = 34.5mΩ at VGS = -4.5V, ID = -5.6A
High power and handing capability in a widely used surface
mount package
Fast switching speed
General Description
These dual N and P-Channel enhancement mode power
MOSFETs are produced using Fairchild Semiconductor’s
advanced PowerTrench process that has been especially
tailored to minimize on-state resistance and yet maintain
superior switching performance.
These devices are well suited for low voltage and battery
powered applications where low in-line power loss and fast
switching are required.
Applications
Inverter
Synchronous Buck
SO-8
D2
D2
D1
D1
Pin 1
G2
S2
G1
S1
D2 5
D2 6
D1 7
D1 8
Q2
Q1
4 G2
3 S2
2 G1
1 S1
MOSFET Maximum Ratings TA = 25°C unless otherwise noted
Symbol
VDS
VGS
ID
EAS
PD
TJ, TSTG
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current - Continuous
- Pulsed
TA = 25°C
Single Pulse Avalanche Energy
Power Dissipation for Dual Operation
Power Dissipation for Single Operation
TA = 25°C
TA = 25°C
Operating and Storage Junction Temperature Range
Thermal Characteristics
(Note 3)
(Note 1a)
(Note 1c)
Q1 Q2
30 -30
±20 ±25
8.6 -7.3
20 -20
50 11
2.0
1.6
0.9
-55 to +150
Units
V
V
A
mJ
W
°C
RθJC
RθJA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
Package Marking and Ordering Information
(Note 1)
(Note 1a)
40
78
°C/W
Device Marking
FDS8858CZ
Device
FDS8858CZ
Package
SO-8
Reel Size
13”
Tape Width
12mm
Quantity
2500 units
©2011 Fairchild Semiconductor Corporation
FDS8858CZ Rev.C
1
www.fairchildsemi.com
1 page  
Typical Characteristics (Q1 N-Channel)TJ = 25°C unless otherwise noted
10
ID = 8.6A
8
6
4
VDD = 10V
VDD = 15V
VDD = 20V
2
0
0 4 8 12 16
Qg, GATE CHARGE(nC)
Figure 7. Gate Charge Characteristics
20
3000
1000
Ciss
Coss
Crss
100 f = 1MHz
VGS = 0V
50
0.1
1 10
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure8. Capacitancevs Drain
to Source Voltage
30
20
10
TJ = 125oC
TJ = 25oC
10-3
VDS = 0V
10-4
10-5
10-6
TJ = 125oC
TJ = 25oC
1
0.01
0.1 1 10
tAV, TIME IN AVALANCHE(ms)
Figure9. Unclamped Inductive
Switching Capability
8
100
6
VGS = 10V
4
VGS = 4.5V
2
RθJA = 78oC/W
0
25 50 75 100 125
TA, AMBIENT TEMPERATURE (oC)
Figure 11. Maximum Continuous Drain
Current vs Ambient Temperature
150
10-7
0
5 10 15 20 25
VGS, GATE TO SOURCE VOLTAGE(V)
30
Figure 10. Gate Leakage Current vs Gate to
Source Voltage
50
10
1ms
1
THIS AREA IS
LIMITED BY rDS(on)
0.1
0.01
0.1
1
SINGLE PULSE
TJ = MAX RATED
RθJA = 135oC/W
TA = 25oC
10
10ms
100ms
1s
10s
DC
80
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 12. Forward Bias Safe
Operating Area
©2011 Fairchild Semiconductor Corporation
FDS8858CZ Rev.C
5
www.fairchildsemi.com
5 Page 
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