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부품번호 | FDMS7556S 기능 |
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기능 | MOSFET ( Transistor ) | ||
제조업체 | Fairchild Semiconductor | ||
로고 | |||
전체 6 페이지수
October 2014
FDMS7556S
N-Channel PowerTrench® SyncFETTM
25 V, 130 A, 1.2 mΩ
Features
General Description
Max rDS(on) = 1.2 mΩ at VGS = 10 V, ID = 35 A
Max rDS(on) = 1.65 mΩ at VGS = 4.5 V, ID = 31 A
Advanced Package and Silicon combination for low rDS(on)
and high efficiency
SyncFET Schottky Body Diode
MSL1 robust package design
100% UIL tested
RoHS Compliant
The FDMS7556S has been designed to minimize losses in
power conversion application. Advancements in both silicon and
package technologies have been combined to offer the lowest
rDS(on) while maintaining excellent switching performance. This
device has the added benefit of an efficient monolithic Schottky
body diode.
Applications
Synchronous Rectifier for Synchronous Buck Converters
Notebook
Server
Telecom
High Efficiency DC-DC Switch Mode Power Supplies
Top Bottom
Pin 1
S D5
4G
S
S
G
D6
3S
Power 56
D
D
D
D
D7
D8
2S
1S
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
VGS
ID
EAS
PD
TJ, TSTG
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous (Package limited)
-Continuous (Silicon limited)
-Continuous
-Pulsed
TC = 25 °C
TC = 25 °C
TA = 25 °C
Single Pulse Avalanche Energy
Power Dissipation
TC = 25 °C
Power Dissipation
TA = 25 °C
Operating and Storage Junction Temperature Range
Thermal Characteristics
(Note 4)
(Note 1a)
(Note 3)
(Note 1a)
Ratings
25
±20
130
222
35
200
312
96
2.5
-55 to +150
Units
V
V
A
mJ
W
°C
RθJC
RθJA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
Package Marking and Ordering Information
(Note 1a)
1.3
50
°C/W
Device Marking
FDMS7556S
Device
FDMS7556S
©2013 Fairchild Semiconductor Corporation
FDMS7556S Rev.C4
Package
Power 56
1
Reel Size
13 ’’
Tape Width
12 mm
Quantity
3000 units
www.fairchildsemi.com
Typical Characteristics TJ = 25 °C unless otherwise noted
10
ID = 35 A
8
6
4
2
VDD = 10 V
VDD = 13 V
VDD = 16 V
0
0 20 40 60 80 100
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics
10000
1000
Ciss
Coss
f = 1 MHz
VGS = 0 V
Crss
100
0.1 1 10
VDS, DRAIN TO SOURCE VOLTAGE (V)
30
Figure8. CapacitancevsDrain
to Source Voltage
50 225
TJ = 25 oC
180
VGS = 10 V
10
TJ = 100 oC
135 VGS = 4.5 V
TJ = 125 oC
90
Limited by Package
RθJC = 1.3 oC/W
45
1
0.01
0.1 1 10 100
tAV, TIME IN AVALANCHE (ms)
Figure9. UnclampedInductive
Switching Capability
1000
300
100
1ms
10
10 ms
THIS AREA IS
1 LIMITED BY rDS(on)
0.1
0.01
0.01
SINGLE PULSE
TJ = MAX RATED
RθJA = 125 oC/W
TA = 25 oC
0.1 1
100 ms
1s
10 s
DC
10 100
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 11. Forward Bias Safe
Operating Area
0
25 50 75 100 125
TC, CASE TEMPERATURE (oC)
Figure 10. Maximum Continuous Drain
Current vs Case Temperature
150
1000
100
SINGLE PULSE
RθJA = 125 oC/W
TA = 25 oC
VGS = 10V
10
1
0.5
10-3
10-2
10-1
1
10
t, PULSE WIDTH (sec)
100
Figure 12. Single Pulse Maximum
Power Dissipation
1000
©2013 Fairchild Semiconductor Corporation
FDMS7556S Rev.C4
4
www.fairchildsemi.com
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부품번호 | 상세설명 및 기능 | 제조사 |
FDMS7556S | MOSFET ( Transistor ) | Fairchild Semiconductor |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |