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PDF PL611S-02 Data sheet ( Hoja de datos )
| Número de pieza | PL611S-02 | |
| Descripción | Smallest Programmable Clock | |
| Fabricantes | Microchip | |
| Logotipo |  |
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PL611S-02
1.8V-3.3V PicoPLL, World’s Smallest Programmable Clock
Features
• Lowest-Power, Smallest Programmable PLL
• Very Low Jitter and Phase Noise
• Output Frequency up to:
- 110 MHz @ 1.8V Operation
- 166 MHz @ 2.5V Operation
- 200 MHz @ 3.3V Operation
• Input Frequency:
- Fundamental Crystal: 10 MHz to 50 MHz
- Reference Clock: 1 MHz to 200 MHz
• Accepts >0.1V Reference Signal Input Voltage
• One I/O Pin can be Configured as Output Enable
(OE), Frequency Switching (FSEL), Power Down
(PDB) Input, or CLK1 Output.
• <10 μA Current Consumption with PDB Active.
• Single 1.8V to 3.3V, ±10% Power Supply
• Operating Temperature Range from –40°C to
+85°C
• Available in 6-pin DFN and SOT-23
GREEN/RoHS Compliant Packages
General Description
The PL611s-02 is a low-power, small form factor, high
performance OTP-base programmable frequency
synthesizer and a part in the PicoPLL Factory
Programmable Quick Turn Clocks family.
Designed to fit in a small DFN or SOT-23 package for a
broad range of applications, the PL611s-02 offers the
best phase noise and jitter performance, and power
consumption of its rivals. In addition, one
programmable I/O pin can be configured as Output
Enable (OE), Frequency Switching (FSEL), Power
Down (PDB) input, or CLK1 (FOUT, FREF, FREF/2)
output. The power down feature of PL611s-02, when
activated, allows the IC to consume less than 10 μA of
power, while its programming flexibility allows
generating any output, up to 200 MHz using a low-cost
crystal or reference input.
Package Types
PL611S-02
DFN
2.0x1.3
Top View
PL611S-02
SOT-23
3.0x3.0
Top View
32 1
456
321
SOT-23-6
456
1 page  
PL611S-02
TABLE 1-2: AC SPECIFICATIONS (CONTINUED)
Parameters
Symbol Min.
Typ.
Max.
Output Enable Time
——
10
VDD Sensitivity
Output Rise Time
——
–2 —
— 1.2
2
2
1.7
Output Fall Time
— 1.2 1.7
45 50
55
Duty Cycle
45 50
55
40 —
60
Period Jitter, Pk-to-Pk
(Note 1)
(10,000 samples measured)
— 70
—
Note 1: Jitter performance depends on the programming parameters.
Units
ns
ms
ppm
ns
ns
%
Conditions
OE Function; TA =25°C,
15 pF Load. Add one
clock period to this measure-
ment for a usable
clock output.
PDB Function; TA =25°C,
15 pF Load
Frequency vs. VDD ±10%
15 pF Load, 10/90% VDD,
High Drive, 3.3V
15 pF Load, 90/10% VDD,
High Drive, 3.3V
@2.5V and 3.3V over entire
frequency range, VDD/2
@1.8V, ≤ 75 MHz FOUT,
VDD/2
@1.8V, 75 MHz < FOUT ≤
110 MHz
ps
With capacitive decoupling
between VDD and GND
TABLE 1-3: CRYSTAL SPECIFICATIONS
Parameters
Symbol
Min
Typ
Max Units
Fundamental Crystal Resonator Frequency
Crystal Loading Rating
(The IC can be programmed for any value in this
range)
Maximum Sustainable Drive Level
Operating Drive Level
Metal Can Crystal
Shunt Capacitance
ESR Max
Small SMD Crystal
Shunt Capacitance
ESR Max
FXIN
CL (xtal)
—
—
C0
ESR
C0
ESR
10
8
—
—
—
—
—
—
— 50 MHz
— 12 pF
— 100 μW
30 — μW
— 5.5 pF
— 50 Ω
— 2.5 pF
— 80 Ω
2016 Microchip Technology Inc.
DS20005670A-page 5
5 Page 
PL611S-02
6-LEAD TDFN 2.0 MM × 1.3 MM PACKAGE OUTLINE & RECOMMENDED LAND PATTERN
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging.
2016 Microchip Technology Inc.
DS20005670A-page 11
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet PL611S-02.PDF ] | |
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