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PDF SM813XXX Data sheet ( Hoja de datos )
| Número de pieza | SM813XXX | |
| Descripción | Flexible Ultra-Low Jitter Clock Synthesizer | |
| Fabricantes | Microchip | |
| Logotipo |  |
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SM813XXX
Flexible Ultra-Low Jitter Clock Synthesizer
Features
• Generates Up to 8 Differential or Single-Ended
Outputs
• <65 fs Phase Jitter @ 156.25 MHz (1.875 MHz to
20 MHz)
• <115 fs Phase Jitter @ 156.25 MHz (12 kHz to
20 MHz)
• On-Chip Power Supply Regulation for Excellent
Power Supply Noise Immunity
• Two High-Performance PLL Synthesizers to
Generate Multiple Frequencies
• Independently Programmable Output Logic and
Frequency:
- Output Logic: LVPECL, LVDS, HCSL,
LVCMOS
• Fundamental Mode Crystal: 31.25 MHz to
156.250 MHz
• No External Crystal Oscillator Capacitors
Required
• 2.5V or 3.3V Operating Power Supply
• Separate Output Power Supplies:
- Each Bank can be at Different Power Supply
Voltage Levels (4 Banks of 2 Outputs Each)
• Industrial Temperature Range, –40°C to +85°C
• Green, RoHS-, and PFOS-Compliant 48-Pin
7 mm x 7 mm QFN Package
Applications
• 1/10/40/100 Gigabit Ethernet (GbE)
• SONET/SDH
• PCI-Express
• CPRI/OBSAI – Wireless Base Station
• Fibre Channel
• SAS/SATA
• DIMM (DDR2/DDR3/AMB)
• HDMI
General Description
The SM813xxx is a dual-PLL clock generator that
achieves ultra-low phase jitter (<65 fsRMS). With 8 total
outputs and dividers on each output, this device can
generate 8 different frequencies up to 850 MHz, from a
low-cost quartz crystal.
Each of 8 outputs can be independently programmed
to LVPECL, LVDS, HCSL, or LVCMOS logic. For
LVCMOS, only the true side of the channel is used.
The SM813xxx is packaged in a 48-pin QFN with up to
8 outputs.
Package Type
SM813XXX
48-Pin QFN (M)
VDDAP2
VDD
QC1
VDDOC
/QC1
QC2
/QC2
OEC
QD1
VDDOD
/QD1
VSS
1 48 47 46 45 44 43 42 41 40 39 38 3736
2 35
3 34
4 33
5 32
6 31
7 SM813xxx 30
8 29
9 28
10 27
11 26
12 25
13 14 15 16 17 18 19 20 21 22 23 24
VDD
/QA1
QA1
VDDOA
/QA2
QA2
VDDOA
OEA
/QB1
QB1
VSS
OEB
2016 Microchip Technology Inc.
DS20005538B-page 1
1 page  
SM813XXX
TABLE 1-6: CRYSTAL CHARACTERISTICS (CONTINUED)
Parameters
Min. Typ. Max.
Equivalent Series Resistance (ESR)
— — 80
Load Capacitance (CL)
Shunt Capacitor, C0
Correlation Drive Level
—8—
—1
2
— 10 100
Units
Ω
pF
pF
µW
Conditions
Saunders 250B,
25Ω Pi Network
Device Equivalent Load
—
—
TABLE 1-7: AC ELECTRICAL CHARACTERISTICS
Electrical Characteristics: VDD = VDDO1/2 = 3.3V ±5% or 2.5V ±5%; VDD = 3.3V ±5%, VDDO1/2 = 3.3V ±5% or 2.5V
±5%; TA = –40°C to +85°C.
Symbol Parameters
Min. Typ. Max. Units Conditions
FIN
FOUT
Input Frequency
Output Frequency
31.25
12
12
50 156.25 MHz XO
— 850 MHz LVPECL, LVDS, HCSL
— 250
LVCMOS
tr/tf
Output Rise/Fall Time (Note 1) 85
135 350
ps LVPECL Output
85 140 300
LVDS Output
175 300 450
HCSL Output
ODC
TSKEW
Output Duty Cycle
Output-to-Output Skew
(Note 2, Note 3)
100 200 400
45 50 55
48 50 52
— — 50
LVCMOS Output
% All Output Frequencies
<350 MHz Output Frequencies
ps Note 3, Same Output Bank
TLOCK
Tjit(Ø)
PLL Lock Time
RMS Phase Jitter (Note 4,
Note 5)
— 5 20 ms VDD = 90%
— 112 150 fs Integration Range 12 kHz -
20 MHz
Note 1: See Figure 4-6.
— 64 —
Integration Range 1.875 MHz -
20 MHz
2: Output-to-output skew is defined as skew between outputs at the same supply voltage and with equal load
conditions. It is measured at the output differential crossing points.
3: Output-to-output skew is only defined for outputs in the same PLL bank [A:B, C:D] with the same output logic
type setting.
4: All phase noise measurements were taken with an Agilent 5052B phase noise system.
5: Measured using a 52.0833 MHz crystal as the input reference source.
There are sufficient feedback dividers to support below 20 MHz, down to about 12 MHz, but phase noise performance
will be impacted. Please contact Microchip TCG Applications for more information.
2016 Microchip Technology Inc.
DS20005538B-page 5
5 Page 
SM813XXX
FIGURE 3-3:
156.25 MHz, LVDS Integration Range 12 kHz to 20 MHz: 105 fsRMS.
2016 Microchip Technology Inc.
DS20005538B-page 11
11 Page | ||
| Páginas | Total 21 Páginas | |
| PDF Descargar | [ Datasheet SM813XXX.PDF ] | |
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