Datasheet.kr   

TMM41257T-15 데이터시트 PDF




Toshiba에서 제조한 전자 부품 TMM41257T-15은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


PDF 형식의 TMM41257T-15 자료 제공

부품번호 TMM41257T-15 기능
기능 N-channel dynamic RAM
제조업체 Toshiba
로고 Toshiba 로고


TMM41257T-15 데이터시트 를 다운로드하여 반도체의 전기적 특성과 매개변수에 대해 알아보세요.



전체 17 페이지수

미리보기를 사용할 수 없습니다

TMM41257T-15 데이터시트, 핀배열, 회로
TOSHIBA MOS MEMORY PRODUCT
262,144 WORD X 1 BIT DYNAMIC RAM
SILICON MONOLITHIC
N-CHANNEL SILICON GATE MOS
TMM41257P/T-12
TMM41257P/T-15
DESCRIPTION
The TMM41257P/T is the N-channel dynamic RAM organized 262,144 words by 1 bit. Multiplexed address inputs
permit the TMM41257P/T to be packaged in a standard 16 pin plastic DIP and 18 pin plastic leaded chip carrier. The
package size provides high system bit densities and is compatible with widely available automated testing and insertion
equipment. The double layered MOS technology with polycide and poly Si permits the TMM41257P/T high speed
operation. Also, the advanced circuit techniques have realized low power dissipation. System oriented features include
single power supply of 5V±10% tolerance, direct interfacing capability with high performance logic families such as
schottky TTl. In addition to the RAS only refresh mode, a CAS before RAS automatic refresh is available. Another special
feature of TMM41257P/T is nibble mode, allowing the user to serially access 4 bits of data at a high data rate.
FEATURES
• 262,144 words by 1 bit organization
• Fast access time and cycle time
RAS Access Time
CAS Access Time
Cycle Time
Nibble Mode
Access Time
Nibble Mode
Cycle Time
TMM41257P/T-12 TMM41257P/T-15
-1--------
120ns
150ns
60ns ---_.
220ns
75ns
260ns
30ns
40ns
55ns
70ns
• Single power supply of 5V±10% with a built-in
VBB generator
• Low Power:
385mW MAX. Operating (TMM41257P/T-12)
330mW MAX. Operating (TMM41257P/T-15)
28mW MAX. Standby
• Output unlatched at cycle end allows two-
dimensional chip selection
• Common I/O capability using "EARLY WRITE"
operation
• Read-Modify-Write, CAS before RAS refresh, RAS-
only refresh, Hidden refresh, and Nibble Mode
capability
• All inputs and output TIL compatible
• 256 refresh cycles/4ms
G Package
Plastic DIP
:TMM41257P
Plastic Leaded Chip Carrier
:TMM41257T
PIN CONNECTION (TOP VIEW)
• Plastic LCC
• Plastic DIP
CAS
VSS
A8 1
DIN 2
I-
:J
O«Z««0<0 0 C') '<t
IwruoI-«z««N
_0:
0:
~
A8
DIN
RAS
AO
A2
A1
VCC
PIN NAMES
AO - A8
CAS
DIN
DOUT
RAS
WRITE
VCC
- - - -------~-
VSS
---
Address Inputs
Column Address Strobe
Data In
Data Out
Row Address Strobe
Read/Write Input
Power (+5V)
----------------.
Ground
----
--
---
---
VSS
CAS
WRITE
A3
A4
A5
A7
AO
A1
A2
A3
A4
A5
A6
A7
A8
BLOCK DIAGRAM
DOUT
MEMORY
ARRAY
- A-33 -




TMM41257T-15 pdf, 반도체, 판매, 대치품
TMM41257P/T-12
TMM41257P/T-15
CAPACITANCE (VCC=SV±10%, f=1 MHz, Ta=0-70°C)
SYMBOL
PARAMETER
MIN.
Cl1 Input Capacitance (AO-AS, DIN)
Cl2 Input Capacitance (RAS, CAS, WR I T E)
Co Output Capacitance (DOUT)
-1MAX.
5
7
7
UNITS
pF
-- - -pF
pF
NOTES:
1. Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent
damage to the device.
2. All voltages are referenced to VSS.
3. ICC1, ICC3, ICC4, ICC5 depend on cycle rate.
4. ICC1, ICC4 depend on output loading. Specified values are obtained with the output open.
5. An initial pause of 200.us is required after power-up followed by any 8 RAS cycles before
proper device operation is achieved. In case of using internal refresh counter, a minimum of
8 CAS Before RAS initializatio.Q cycles instead of 8 RAS cycles are required.
6. AC measurements assume tT=5ns.
7. VIH(min.) and VIL(max.) are reference levels for measuring timing of input signals. Also,
transition times are measured between VIH and VIL.
8. Assumes that tRCD~tRCD (max.). If tRCD is greater than the maximum recommended value
shown in this table, tRAC will increase by the amount that tRCD exceeds the value shown.
9. Assumes that tRCD~tRCD (max.).
10. Measured with a load equivalent to 2 TTL loads and 100pF.
11. tOFF(max.) defines the time at which the output achieves the open circuit condition and is
not referenced to output voltage levels.
12. Either tRCH or tRRH must be satisfied for a read cycle.
13. Operation within the tRCD(max.) limit insures that tRAc(max.) can be met. tRCD(max.) is
specified as a reference point only: If tRCD is greater than the specified tRCD(max.) limit,
then access time is controlled exclusively by tCAC.
14. These parameters are referenced to CAS leading edge in early write cycles and to WR IT E
leading edge in read-write or read-modify-write cycles.
15. twcs, tewD and tRWD are not restrictive operating parameters. They are included in the
data sheet as electrical characteristics only. If twcs~twcs(min.), the cycle is an early write
cycle and the data out pin will remain open circuit (high impedance) throughout the entire
cycle; If tCWD~tCWD(min.) and tRWD~tRWD(min.), the cycle is a read-write cycle or read-
modify-vv'rite cycle and the data out will contain data read from the selected cell: If neither of
the above sets of conditions is satisfied, the condition of the data out (at access time) is
indeterminate.
- A-36 -

4페이지










TMM41257T-15 전자부품, 판매, 대치품
• NIBBLE MODE READ CYCLE
RAS VIH
VIL
CAS
VIH
VIL
AD-A8
VIH
VIL
DOUT
VOH
vOL
WR ITE
VIH
VIL
• NIBBLE MODE WRITE CYCLE
RAS VIH
VIL
CAS
VIH
VIL
AD-AS
VIH
VIL
TMM41257P/T-12
TMM41257P/T-15
rm Don'! Care
DOUT
_______________ OPEN
- A-39 -
~ Don'!Care

7페이지


구       성 총 17 페이지수
다운로드[ TMM41257T-15.PDF 데이터시트 ]

당사 플랫폼은 키워드, 제품 이름 또는 부품 번호를 사용하여 검색할 수 있는

포괄적인 데이터시트를 제공합니다.


구매 문의
일반 IC 문의 : 샘플 및 소량 구매
-----------------------------------------------------------------------

IGBT, TR 모듈, SCR 및 다이오드 모듈을 포함한
광범위한 전력 반도체를 판매합니다.

전력 반도체 전문업체

상호 : 아이지 인터내셔날

사이트 방문 :     [ 홈페이지 ]     [ 블로그 1 ]     [ 블로그 2 ]



관련 데이터시트

부품번호상세설명 및 기능제조사
TMM41257T-12

N-channel dynamic RAM

Toshiba
Toshiba
TMM41257T-15

N-channel dynamic RAM

Toshiba
Toshiba

DataSheet.kr       |      2020   |     연락처      |     링크모음      |      검색     |      사이트맵