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FCH043N60 데이터시트 PDF




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기능 MOSFET ( Transistor )
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FCH043N60 데이터시트, 핀배열, 회로
April 2014
FCH043N60
N-Channel SuperFET® II MOSFET
600 V, 75 A, 43 mΩ
Features
• 650 V @ TJ = 150°C
• Typ. RDS(on) = 37 mΩ
• Ultra Low Gate Charge (Typ. Qg = 163 nC)
• Low Effective Output Capacitance (Typ. Coss(eff.) = 730 pF)
• 100% Avalanche Tested
• RoHS Compliant
Applications
• Telecom / Sever Power Supplies
• Industrial Power Supplies
Description
SuperFET® II MOSFET is Fairchild Semiconductor’s brand-new
high voltage super-junction (SJ) MOSFET family that is utilizing
charge balance technology for outstanding low on-resistance
and lower gate charge performance. This advanced technology
is tailored to minimize conduction loss, provide superior
switching performance, and withstand extreme dv/dt rate and
higher avalanche energy. Consequently, SuperFET II MOSFET
is suitable for various AC/DC power conversion for system
miniaturization and higher efficiency.
D
G
D
S
TO-247
G
Absolute Maximum Ratings TC = 25oC unless otherwise noted.
Symbol
VDSS
VGSS
ID
IDM
EAS
IAR
EAR
dv/dt
PD
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current
Drain Current
- DC
- AC
- Continuous (TC = 25oC)
- Continuous (TC = 100oC)
- Pulsed
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
MOSFET dv/dt
Peak Diode Recovery dv/dt
Power Dissipation
(TC = 25oC)
- Derate Above 25oC
(f > 1 Hz)
(Note 1)
(Note 2)
(Note 1)
(Note 1)
(Note 3)
TJ, TSTG
TL
Operating and Storage Temperature Range
Maximum Lead Temperature for Soldering,
1/8” from Case for 5 Seconds
Thermal Characteristics
Symbol
RθJC
RθJA
Parameter
Thermal Resistance, Junction to Case, Max.
Thermal Resistance, Junction to Ambient, Max.
S
FCH043N60
600
±20
±30
75
47.5
225
2025
15
5.92
100
20
592
4.74
-55 to +150
300
FCH043N60
0.21
40
Unit
V
V
A
A
mJ
A
mJ
V/ns
W
W/oC
oC
oC
Unit
oC/W
©2014 Fairchild Semiconductor Corporation
FCH043N60 Rev. C0
1
www.fairchildsemi.com




FCH043N60 pdf, 반도체, 판매, 대치품
Typical Performance Characteristics (Continued)
Figure 7. Breakdown Voltage Variation
vs. Temperature
1.2
*Notes:
1. VGS = 0V
2. ID = 10mA
1.1
Figure 8. On-Resistance Variation
vs. Temperature
2.5
*Notes:
1. VGS = 10V
2. ID = 38A
2.0
1.0 1.5
0.9 1.0
0.8
-100
-50 0 50 100 150
TJ, Junction Temperature [oC]
200
Figure 9. Maximum Safe Operating Area
1000
100 10μs
100μs
10 1ms
10ms
DC
1 Operation in This Area
is Limited by R DS(on)
*Notes:
0.1 1. TC = 25oC
0.01
1
2. TJ = 150oC
3. Single Pulse
10 100
VDS, Drain-Source Voltage [V]
1000
Figure 11. Eoss vs. Drain to Source Voltage
Switching Capability
45
36
27
18
9
0
0 122 244 366 488
VDS, Drain to Source Voltage [V]
©2014 Fairchild Semiconductor Corporation
FCH043N60 Rev. C0
610
0.5
-100
-50 0 50 100
TJ, Junction Temperature [oC]
150
Figure 10. Maximum Drain Current
vs. Case Temperature
75
50
25
0
25 50 75 100 125 150
TC, Case Temperature [oC]
4 www.fairchildsemi.com

4페이지










FCH043N60 전자부품, 판매, 대치품
Figure 16. Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
I SD
Driver
RG
VGS
+
VDS
_
L
Same Type
as DUT
• dv/dt controlled by RG
• ISD controlled by pulse period
VDD
VGS
( Driver )
I SD
( DUT )
VDS
( DUT )
D = --GG--aa--tt-ee--P-P-u-u-ll-ss-ee---PW--e-i-dr-ito-h-d-
10V
IFM , Body Diode Forward Current
di/dt
IRM
Body Diode Reverse Current
Body Diode Recovery dv/dt
VSD
Body Diode
Forward Voltage Drop
VDD
©2014 Fairchild Semiconductor Corporation
FCH043N60 Rev. C0
7
www.fairchildsemi.com

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