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PDF APW8733 Data sheet ( Hoja de datos )
| Número de pieza | APW8733 | |
| Descripción | Dual-Phase COT Buck PWM Controller | |
| Fabricantes | ANPEC | |
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APW8733
Dual-Phase COT Buck PWM Controller with Dynamic Voltage
Features
General Description
• High Input Battery Voltages Range from 1.8V to The APW8733 is a dual-phase PWM control IC which
25V Input Power
provides a precision voltage regulation system for ad-
• Multiform Purpose Input Voltage Collocation: VCC vanced graphic card and motherboard applications. The
= 5V / VIN = 5.5V ~ 19V for NB MXM application
integration of dual-phase power MOSFET drivers into the
• Built in VREF voltage = 2.0V +1% with all controller IC and reduces the number of external parts for
temperature range
a cost and space saving power management solution.
• External reference input with PWM VID Dynamic The APW8733 uses a constant on time architecture
voltage control
control, and results in excellent transient response and
• Integrated Bootstrap Forward P-CH MOSFET
accurate DC voltage output in either PFM or PWM Mode.
• Built in Adjustable Frequency by TON : 100KHz ~ In Pulse Frequency Mode (PFM), the APW8733 provides
800KHz range
very high efficiency over light to heavy loads with loading
modulated switching frequencies. In PWM Mode, the con-
• Built in Constant On Time PWM Control with verter works nearly at constant frequency for low-noise
Current Sharing Operation
requirements. The device uses the voltage across the
• Built in External Soft-Start & Soft-Stop functions low side RDS(ON) for current sensing achieves high
for output voltage
efficiency. The device integrates adjustable load line volt-
• Support Single and Two phases PWM Control by age positioning (droop) and adopts low side RDS(ON) for
LGATE2 & PSI voltage setting
channel-current balance. The APW8733 also implement
• Built in Programmable OCP function by Sensing a VID control operation in which the feedback voltage is
Low Side MOSFET
regulated and tracks external input reference voltage. This
• Built in UVP (50%), OVP(145%) & Thermal controller protection features include over-temperature
Shutdown functions on PWM Channel
(OTP), over-voltage (OVP), under-voltage (UVP) and over-
• Built in PGOOD indicator for output voltage
current protections (OCP). The device also provides a
power-on-reset function and a external programmable
• Built in POR Control Scheme Implemented at 4. soft-start to prevent wrong operation and limit the input
25V ~ 4.45V range
surge current during power-on or start-up. The APW8733
• Shutdown Control byEN using an External MOSFET is available in TQFN 3x3-20 packages.
• TQFN 3x3-20 Package
Applications
• VGA
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and
advise customers to obtain the latest version of relevant information to verify before placing orders.
Copyright © ANPEC Electronics Corp.
Rev. A.1 - Jan., 2016
1
www.anpec.com.tw
1 page  
APW8733
Electrical Characteristics
Refer to Figure. 1 in the “Typical Application Circuits”. These specifications apply over VIN = 12V, VCC = 5V, TA = 25oC, unless otherwise
noted. Typical values are at TA = 25oC.
S ymbol
Parame ter
Test Conditions
APW 8733
Min Typ Max
Unit
CHIP ENABLE
VENH
V ENL
Ch ip Enab le Thr eshold
Ch ip Shutdown Threshol d
EN Risin g
EN Fa lling
1.2 -
-V
- - 0.6 V
EN_LCD L eakage Curre nt
POWER GOOD INDICATOR
VCC = E N = 5V
- 0 .1 1 µA
PGO OD L eakage curren t
VPGOOD = 5V
- 0 .1 1.0 µA
PGO OD o utp ut low vo lta ge
PGO OD d elay time
IPGOOD_SINK = 4mA
EN goes high to PGOO D go es hi gh
0 .5 1.0
V
-
30 0 350
us
PGO OD Disabl e Deb ounce
VS NS be lows the Hysteresis o f 85% VREFIN
-
20
-
us
time to P GOOD go es low
POWER SAVING MO DE
V PSI_ H
VPSI_L
V LG2 _1
PSI Hig h Thre sh old Volta ge
PSI Low Thre sh old Vo lta ge
VLG2_1 Thresho ld Vo ltag e
VPSI Rising
VPSI Falli ng
(Note5)
0.9 1 1.1
0.54
0 .6
6.6
0.54 0 .6 0 .66
V
V
V
V LG2 _2
V LG2 _3
VLG2_2 Thresho ld Vo ltag e
VLG2_3 Thresho ld Vo ltag e
Two-Pha se with PWM to
Sing le-Ph ase with PFM
debo unce time
Two-Pha se with PWM to
Sing le-Ph ase with PWM
debo unce time
Two-Pha se with PWM to
Sing le-Ph ase with Ul tra -so nic
PFM de boun ce time
Switchi ng Fr equen cy of
Ul tra -so nic PFM
(Note5)
(Note5)
EN = high, PSI = low, RLG2SET = 4K
0 .9 675 1.07 5 1.182 5
1.62 1 .8 1 .98
V
V
- 30 0 -
us
- 30 0 -
us
- 30 0 -
us
25 30 35 kHz
ILG2SET Mo de Setting Current
REFE RE NCE VO LTAGE
VREF Re fe rence Volta ge Accuracy
Sou rce from LGATE2 Te rminals
IREF=100 uA, TA= -20 OC ~ 85OC
230 24 0 250
µA
1.98 2.00 2 .02
V
IREF
Δ VREF
VREF Maximum Output Cu rrent
Re fe rence Volta ge Load
Re gulation
VREF = GND
I REF= 0~ 2m A
-5
-5 -
- mA
5 mV
VREF Discharg e Resista nce
- - 100 Ω
VREFIN O perating Rang e
RE FIN Inp ut Le akage Curren t
0.2 -
2V
- - 0.1 µA
Copyright © ANPEC Electronics Corp.
Rev. A.1 - Jan., 2016
5
www.anpec.com.tw
5 Page 
APW8733
Function Description
Constant-On-Time PWM Controller with Input Feed-For-
ward
The constant-on-time control architecture is a pseudo
fixed frequency with input voltage feed-forward. This ar-
chitecture relies on the output filter capacitor’s effective
series resistance (ESR) to act as a current-sense resis-
tor so the output ripple voltage provides the PWM ramp
signal. In PFM operation, the high-side switch on-time is
controlled by the on-time generator is determined solely
by a one-shot whose pulse width is inversely propor-
tional to the input voltage and directly proportional to the
output voltage. In PWM operation, the high-side switch
on-time is determined by a switching frequency control
circuit in the on-time generator block. The switching fre-
quency control circuit senses the switching frequency of
the high-side switch and keeps regulating it at a constant
frequency in PWM mode. The design improves the fre-
quency variation and is more outstanding than a conven-
tional constant-on-time controller, which has large switch-
ing frequency variation over input voltage, output current,
and temperature. Both in PFM and PWM, the on-time
generator, which senses input voltage on TON pin, pro-
vides very fast on-time response to input line transients.
Another one-shot sets a minimum off-time (typical:
300ns). The on-time one-shot is triggered if the error com-
parator is high, the low-side switch current is below the
current-limit threshold, and the minimum off-time one-
shot has timed out.
Pulse-Frequency Modulation (PFM)
In PFM mode, an automatic switchover to pulse-frequency
modulation (PFM) takes place at light loads. This
switchover is affected by a comparator that truncates the
low-side switch on-time at the inductor current zero
crossing. This mechanism causes the threshold between
PFM and PWM operation to coincide with the boundary
between continuous and discontinuous inductor-current
operation (also known as the critical conduction point).
The on-time of PFM is given by:
Where FSW is the nominal switching frequency of the con-
verter in PWM mode. The load current at handoff from
PFM to PWM mode is given by:
TLOAD(PFM − PWM) = 1 × VOUT − VOUT × TON − PFM
2L
= VIN − VOUT × 1 × VOUT
2L FSW VIN
Forced-PWM Mode
The Forced-PWM mode disables the zero-crossing
comparator, which truncates the low-side switch on-time
at the inductor current zero crossing. This causes the
low-side gate-drive waveform to become the complement
of the high-side gate-drive waveform. This in turn causes
the inductor current to reverse at light loads while UGATE
maintains a duty factor of V . The benefit of Forced-
OUT/VIN
PWM mode is to keep the switching frequency fairly
constant. The Forced-PWM mode is most useful for re-
ducing audio frequency noise, improving load-transient
response, and providing sink-current capability for dy-
namic output voltage adjustment.
VCC Power-On-Reset (POR)
The Power-On-Reset (POR) circuit compares the input
voltage at VCC with the POR threshold (4.35V rising,
typical) to ensure the input voltage is high enough for
reliable operation. The 0.1V (typ.) hysteresis prevents
supply transients from causing a restart. Once the input
voltage exceeds the POR rising threshold, startup begins.
When the input voltage falls below the POR falling
threshold, the controller turns off the converter.
VREF
This is the output pin of high precision 2V reference
voltage. Bypass this pin with a 1uF ceramic capacitor to
GND. The VREF must have capability to drive 5mA output
current.
TON − PFM = 1 × VOUT
FSW VIN
Copyright © ANPEC Electronics Corp.
Rev. A.1 - Jan., 2016
11
www.anpec.com.tw
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet APW8733.PDF ] | |
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