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PDF APA3011 Data sheet ( Hoja de datos )

Número de pieza APA3011
Descripción 3W Mono Low-Voltage Audio Power Amplifier
Fabricantes ANPEC 
Logotipo ANPEC Logotipo



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APA3010/1
3W Mono Low-Voltage Audio Power Amplifier
Features
Operating Voltage : 2.5V-5.5V
Bridge-Tied Load (BTL) Mode Operation
Supply Current – I =7mA at V =5V
DD DD
Low Shutdown Current – IDD=0.1µA
Low Distortion
2.5W,
at
V =5V,
DD
BTL,
RL=3,
THD+N=0.1%
– 2.1W, at VDD=5V, BTL, RL=4Ω, THD+N=0.1%
Output Power
at 1% THD+N
– 2.6W, at VDD=5V, BTL, RL=3
– 2.3W, at VDD=5V, BTL, RL=4
at 10% THD+N
–3.3W at VDD=5V, BTL, RL=3
–2.7W at VDD=5V, BTL, RL=4
Depop Circuitry Integrated
Thermal Shutdown Protection and Over-Current
Protection Circuitry
High Supply Voltage Ripple Rejection
Surface-Mount Packaging
– MSOP-8P (with Enhanced Thermal Pad)
– SOP-8P (with Enhanced Thermal Pad)
Lead Free and Green Devices Available
(RoHS Compliant)
General Description
The APA3010/1 is a bridged-tied load (BTL) audio power
amplifier developed especially for low-voltage applica-
tions where internal speakers. Operating with a 5V supply,
the APA3010/1 can deliver 3.3W of continuous power into
a BTL 3load at 10% THD+N throughout voice band
frequencies. Although this device is characterized out to
20kHz, its operation is optimized for narrow band appli-
cations such as wireless communications. The BTL con-
figuration eliminates the need for external coupling ca-
pacitors on the output in most applications, which is par-
ticularly important for small battery-powered equipment.
This device features a shutdown mode for power sensi-
tive applications with special depop circuitry to eliminate
speaker noise when exiting shutdown mode. The
APA3010/1 are available in a SOP-8P or MSOP-8P.
Applications
Mobil Phones
PDAs
Portable Electronic Devices
Desktop Computers
Pin Configuration
APA3010
Shutdown 1
Bypass 2
IN+ 3
IN- 4
8 VO-
7 GND
6 VDD
5 VO+
Shutdown 1
Bypass 2
IN+ 3
IN- 4
APA3011
8 VO-
7 GND
6 VDD
5 VO+
= Thermal Pad
(connected to GND plane for better heat dissipation)
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise
customers to obtain the latest version of relevant information to verify before placing orders.
Copyright © ANPEC Electronics Corp.
Rev. A.4 - Oct., 2008
1
www.anpec.com.tw

1 page




APA3011 pdf
APA3010/1
Typical Operating Characteristics (Cont.)
THD+N vs. Frequency
10
VDD=5V
PO=1.6W
RL=4
1
0.1 AV=20dB
0.0120
AV=6dB
100 1k
Frequency (Hz)
10k 20k
THD+N vs. Output Power
10
VDD=5V
AV=6dB
RL=8
1
fin= 20kHz
0.1 fin= 20Hz
0.0110m
fin= 1kHz
100m
1
Output Power (W)
2
5
THD+N vs. Frequency
10
VDD=5V
AV=6dB
RL=8
1
THD+N vs. Frequency
10
VDD=5V
PO=1W
RL=8
1
0.1
0.01
0.00520
PO=0.5W
PO=1W
100 1k
Frequency (Hz)
10k 20k
Frequency Response
+6
Gain
+5
+220
+210
+200
+4
VDD=5V
RL=3
+3 PO=1W
10 100
Phase
1k 10k
Frequency (Hz)
+190
+180
+170
100k 200k
0.1
0.01
0.00520
AV=20dB
AV=6dB
100 1k
Frequency (Hz)
10k 20k
Frequency Response
+6 +220
Gain
+210
+5
+200
+4
VDD=5V
RL=4
+310PO=0.81W00
Phase
1k 10k
Frequency (Hz)
+190
+180
+170
100k 200k
Copyright © ANPEC Electronics Corp.
Rev. A.4 - Oct., 2008
5
www.anpec.com.tw

5 Page





APA3011 arduino
APA3010/1
Application Information (Cont.)
Effective Bypass Capacitor, CB (Cont.)
The effect of a larger bypass capacitor will improve PSRR
due to increased supply stability. Typical applications em-
ploy a 5V regulator with 1.0µF and a 0.1µF bypass capaci-
tor as supply filtering. This does not eliminate the need
for bypassing the supply nodes of the APA3010/1. The
selection of bypass capacitors, especially CB, is thus de-
pendent upon desired PSRR requirements, click and pop
performance.
To avoid the start-up pop noise occurred, the bypass volt-
age should rise slower than the input bias voltage and
the relationship shown in equation (4) should be
maintained.
1
CB x 125k
<<
1
40kx
C
i
(4)
The bypass capacitor is fed thru from a 125kresistor
inside the amplifier and the 40kis maximum input re-
sistance of (Ri+ Rf). Bypass capacitor, CB, values of 3.3µF
to 10µF ceramic or tantalum low-ESR capacitors are rec-
ommended for the best THD and noise performance.
The bypass capacitance also effects to the start-up time.
It is determined in the following equation :
Tstart
up
=
5
x
(C
B
x
125k)
(5)
Power Supply Decoupling, CS
The APA3010/1 is a high-performance CMOS audio am-
plifier that requires adequate power supply decoupling
to ensure the output total harmonic distortion (THD) is as
low as possible. Power supply decoupling also prevents
the oscillations causing by long lead length between the
amplifier and the speaker. The optimum decoupling is
achieved by using two different types of capacitors that
target on different types of noise on the power supply
leads.
For higher frequency transients, spikes, or digital hash
on the line, a good low equivalent-series-resistance(ESR)
ceramic capacitor, typically 0.1µF placed as close as pos-
sible to the device V lead works best. For filtering lower-
DD
frequency noise signals, a large aluminum electrolytic
capacitor of 10µF or greater placed near the audio power
amplifier is recommended.
Optimizing Depop Circuitry
Circuitry has been included in the APA3010/1 to minimize
the amount of popping noise at power-up and when com
ing out of shutdown mode. Popping occurs whenever a
voltage step is applied to the speaker. In order to elimi-
nate clicks and pops, all capacitors must be fully dis-
charged before turn-on. Rapid on/off switching of the de-
vice or the shutdown function will cause the click and pop
circuitry.
The value of Ci will also affect turn-on pops. (Refer to
Effective Bypass Capacitance) The bypass voltage ramp
up should be slower than input bias voltage. Although the
bypass pin current source cannot be modified, the size of
C can be changed to alter the device turn-on time and the
B
amount of clicks and pops. By increasing the value of C ,
B
turn-on pop can be reduced. However, the tradeoff for
using a larger bypass capacitor is to increase the turn-on
time for this device. There is a linear relationship be-
tween the size of CB and the turn-on time.
A high gain amplifier intensifies the problem as the small
delta in voltage is multiplied by the gain. Therefoer, it is
advantageous to use low-gain configurations.
Shutdown Function
In order to reduce power consumption while not in use,
the APA3010/1 contain a shutdown pin to externally turn
off the amplifier bias circuitry. This shutdown feature turns
the amplifier off when a logic high (APA3011 held low) is
placed on the SHUTDOWN pin. The trigger point between
a logic high and logic low level is typically 2.0V. It is best to
switch between the ground and the supply V to provide
DD
maximum device performance.
By switching the SHUTDOWN pin to high, the amplifier
enters a low-current state, IDD< 0.1µA. APA3010 is in shut-
down mode. On normal operating, the SHUTDOWN pin
pulls to low level to keeping the IC out of the shutdown
mode. The SHUTDOWN pin should be tied to a definite
voltage to avoid unwanted state changing.
BTL Amplifier Efficiency
An easy-to-use equation to calculate efficiency starts out
as being equal to the ratio of power from the power sup-
ply to the power delivered to the load.
The following equations are the basis for calculating
amplifier efficiency.
P
Efficiency =
O
PSUP
(6)
Copyright © ANPEC Electronics Corp.
Rev. A.4 - Oct., 2008
11
www.anpec.com.tw

11 Page







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