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PDF APW7255 Data sheet ( Hoja de datos )

Número de pieza APW7255
Descripción Two Channel Regulators and Three Channel Buck Converters PMIC
Fabricantes ANPEC 
Logotipo ANPEC Logotipo



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No Preview Available ! APW7255 Hoja de datos, Descripción, Manual

APW7255
Two Channel Regulators and Three Channel Buck Converters PMIC
Features
General Description
Wide Input Operating Range: 2.9V~5.5V
The APW7255 is a two P-channel low dropout linear regu-
Three Synchronous Buck Regulators for SoC
lator and three synchronous buck converter which needs
-Adjustable Output with 1500mA Output for Core input voltage from 2.9 to 5.5V.
Power
Synchronous buck converter with integrated high side
-Adjustable Output with 1000mA Output for and low side power MOSFET. It is equipped with an
Memory Power
automatic PSM/PWM mode operation. At light load , the
-Adjustable Output with 1000mA Output for IC operates in the PSM mode to reduce the switching
System Power
losses. At heavy load, the IC works in PWM mode.
-1.5MHz Switching Frequency
-High Efficient up to 93%
Low dropout linear regulator delivers current up to 300mA
Tow Low-Dropout Linear Regulators for Sensor: to set output voltage, and it also can work with low ESR
-Adjustable 300mA Output High PSRR, Low Noise
-Adjustable 300mA Output High PSRR, Low Noise
ceramic capacitors. Typical dropout voltage is only 240mV
at 300mA loading.
Thermal-Overload Protection
Power-OK Indicator after CH2 Ready
TQFN3x3-20 Package
Lead Free Green Devices Available (RoHS
Compliant)
The APW7255 is equipped with Power-on-reset, shut-
down control, soft start, over-temperature and current-
limit into a single package to protect the device against
wrong logic control and over-temperature and current
over-loads.
The APW7255 available TQFN3x3-20 provides a very
compact system solution external components and PCB
area.
Simplified Application Circuit
VCC3
VCC1
EN_LDO1
VCC2
EN_LDO2
EN_PWM
VLDO1
LX1
VLDO2
LX2
POK
GND
LX3
Applications
IP-Cam
Car Recorder
Security
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and
advise customers to obtain the latest version of relevant information to verify before placing orders.
Copyright © ANPEC Electronics Corp.
Rev. A.2 - Nov., 2015
1
www.anpec.com.tw

1 page




APW7255 pdf
APW7255
Electrical Characteristics (Cont.)
Unless otherwise specified, these specifications apply over VCC1, VCC2, VCC3=5V, VEN_LDO1=VEN_LDO2=VEN_PWM=5V. Typical values are at
TA=25oC.
Sym bol
Pa ram eter
Test Conditions
POWER MOS FE TS (PWM)
Hi gh Side MOSFE T Leakag e Cu rrent
Low S ide MOSFET Leakag e Cur rent
CURRENT-MODE CO NV ERTE R(PWM)
VEN_PWM=0 V,
VLX1= VLX2=VLX3=0 V,
VCC1= VCC2=5V
VEN_PWM=0 V,
VLX1= VLX2=VLX3=5 V,
VCC1= VCC2=5V
Switch Curre nt to CO MP Voltage
Tran scon ducta nce
TD De ad Time
ENABLE AND INP UT CURRENTS(PWM, LDO)
EN Inp ut High Threshold
EN Inp ut Low Th reshold
EN L eakage Curre nt
POWER-OK AND DELAY(PWM)
VCC1, VCC 2,V CC3=2.9V~5.5 V
VCC1, VCC 2,V CC3=2.9V~5.5 V
VEN_LDOX= VEN_PWM=5V
POK Thresho ld(POK goes high)
POK Thresho ld Hyste resis
POK Dela y Time
POK Pull Low Resista nce
POK Le akage Curren t
PROTECTIONS(PWM)
VFB2 r isi ng
VFB2 Fal ling
The time from VFB=90% *V FB to
POK g oes h igh
VPOK= 0. 1V
EN=0 V, V PG =5V
CH1,2 Ma xim um Inductor Curr ent-Limit
CH3 Maximum Ind uctor Curre nt-Limit
Low S ide Switch Cur rent-Limit
Soft-Start Time
From Dr ain to Source, EN
shutdown to turn on low si de
MOSFET to discha rge Vout till
current limit.
FSW Switchi ng Fr equen cy
Fo ldback Fre quen cy
VFBX =0.6V
Mi nimum On Time
Ma ximu m Duty Cycle
UV P Th reshold
PROTECTIONS(LDO)
Cu rrent Limit
Soft-Start Time
Min
-
-
-
1
-
-1
-
-
-
-
-10 0
1.5
2.0
-
-
1.2
-
-
-
25
330
-
APW72 55
Typ
-
-
5 .2
10
-
-
-
87.8
3
Versio n
different
10 0
-
1 .6
2 .2
0 .3
0 .7
1 .5
21 0
-
-
30
45 0
60
Max
1
1
-
-
0 .4
1
-
-
-
-
+ 100
-
-
-
-
1 .8
-
10 0
10 0
35
-
-
Unit
µA
µA
A/V
ns
V
V
µA
% VREF
% VREF
us
nA
A
A
A
ms
MHz
kHz
ns
%
% VREF
mA
µs
Copyright © ANPEC Electronics Corp.
Rev. A.2 - Nov., 2015
5
www.anpec.com.tw

5 Page





APW7255 arduino
APW7255
Operating Waveforms (Cont.)
Please Refer to Typical Application Circuit, Test Condition is at TA= 25oC unless otherwise specified.
Load Transient Response- LDO2
PWM Converter at Light Load
VLDO2
1
I O UT
2
APW7255A, VLDO2 =3.3V,
COUT=2.2µF, R9=68k, R8=15k
IOUT =10mA-300mA-10mA,
CH1: VLDO2, 50mV/Div, offset=3.3V
CH2: IOUT, 200mA/Div, DC
TIME:50µs/Div
VOUT1
1
VLX 1
2
ILX 1
3
APW7255A, VOUT1 =1.8V, L=2.2µH,
COUT=10µF, C4=47pF, R1=300k, R3=150k
IOUT =1mA,
CH1: VOUT1, 50mV/Div, offset=1.8V
CH2: VLX1, 5V/Div, DC
CH3: ILX1, 100mA/Div, DC
TIME:10µs/Div
PWM Converter at Heavy Load
VOUT1
1
V LX1
2
I LX1
3
APW7255A, VOUT1 =1.8V, L=2.2µH,
COUT=10µF, C4=47pF, R1=300k, R3=150k
IOUT =1A,
CH1: VOUT1, 50mV/Div, offset=1.8V
CH2: VLX1, 5V/Div, DC
CH3: ILX1, 100mA/Div, DC
TIME:0.5µs/Div
Over Load Response-PWM Converter
VOUT1
1 VPOK
2
V LX1
3
UVP
peak
current
limit
I LX1
4
APW7255A, VOUT1 =1.8V, L=2.2µH,
COUT=10µF, C4=47pF, R1=300k, R3=150k
ramp up IOUT till UVP shutdown,
CH1: VOUT1, 1V/Div, DC
CH2: VPOK, 5V/Div, DC
CH3: VLX1, 5V/Div, DC
CH4: ILX1, 1A/Div, DC
TIME:200µs/Div
Copyright © ANPEC Electronics Corp.
Rev. A.2 - Nov., 2015
11
www.anpec.com.tw

11 Page







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