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Número de pieza | TMM2068AD-45 | |
Descripción | STATIC RAM | |
Fabricantes | Toshiba | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de TMM2068AD-45 (archivo pdf) en la parte inferior de esta página. Total 6 Páginas | ||
No Preview Available ! TOSHIBA MOS MEMORY PRODUCT
4,096 WORD X 4 BIT STATIC RAM
SILICON MONOLITHIC
N-CHANNEL SILICON GATE MOS PROCESS
TMM2068AO-25, TMM2068AO-35
TMM2068AO-45
DESCRIPTION
The TMM2068AD is a 16,384 bits high speed and low power static random access memory
organized as 4,096 words by 4 bits and operates from a single 5V supply.
Toshiba's high performance device technology provides both high speed and low power ,
features with a maximum access tin~ of 25ns/35ns/45ns and maximum operating current
(If 135/l20/120mA h'hen L5 goes'high, the device is deselected and placed in a ](l....'
po\,'er standby mode in \,'hich maximum standhy current is 2OrnA.
Thus the T~m2068AD is nost suitable for us in cache memory and high speed storage
The TN!-12068AD is offered in a 20 pin standard cerdip package ....'ith 0.3 inch width jor
high density assembly.
The T~~12068AD is fabricated with ion implanted N channel silicon gate MOS technology
f or high perf ornance and high reI iabiJ i ty.
FEATURES
. Fast access time
tAcc=25ns: TH?·12068AD-25
tAcc=35ns: nl}12068AD-35
tAcc=45ns: TMM2068AD-45
LO\.' po\,'cr dissipation
lcc=135mA: TM~2068AD-25
lcc=120mA: nl}I.2068AD-35
1CC= 120::1,\: Tm12068AD-45
] SB=20mA
Single 5V pO\Jer supply
. Fully static operation
. All inputs and outputs: Directly TTL compatible
Po\.Jer do....·n feature
CS=VIH
Three state (lutputs
Inputs protected: All inputs protection against
static charge'.
Package: 20 pins standard cerd i p pac1:age, 0.3 inch
\ddth.
BLOCK DIAGRAI·'
PH~ CONl'JECTIDrl
1-.7
A€
A5
1.4.
1.3
A';.
1.1
AD
cs
GND
vcc
AS
A9
A1D
,All
1/01
I/O';.
1/03
1/04
WE
PIN NAI1ES
(TOP VI EVi )
AO-All
1/01-1 / 04
CS
\~E
VCC
GND
Address Inputs
Data Inpu t/Ou tpu t
Chip Selec t 1npu t
Hrite Enable Input
Power (+5V)
Ground
J..~
J..€
1-.7
1-.S
A9
A 10 ""-L.-.I -,--y-----,
A 11 ......L--""<-_+__---I
MEMORY
CELL ARRAY
(1';.SX3'i.X4)
11//001~ O~D-=--=--:1tr-U~~-'~srr~~~~~~~~~~~n=~~~~
1/03 o---m-Ct--t-"'I
1/04 O---.r!+I-~-t--'
CS AD Al A'Z A3 At,.
Cs o--t--a-"'"
WEo-t--1t-t4-..J
- C-15 -
1 page TMM2068AO-25, TMM2068AO-35
TMM2068AO-45
\ l-.TRITE CYCLE 2.
_ x tJ...DDRESSES
t.:rr ~
twe
tcw
W I1 ' - - - :
~"WI-t"'-, -I r
·~F---------------------------------~I
f
-
-
-----:.;..=...~'nP
I
_
_1
_--_-_-_-_-_-_-_-_-_-_-_-_--_-_-_-_-_-_-_-_-i-_t-_w-H-_z-~-~-------H>-I<O-tH~-1l-~v-.-p-DE--DA-~A:-N:-~c_SE~_I~-Ill~-IS-~J-"-"-~E-t-D-Hl->-<-~--------------
Note 1. In read cycle 2, all addresses are valid prior to or coincident with
CS transition low.
2. The operating temperature (Ta) is guaranteed with transverse air flow
exceeding 400 linear feet per minute.
- C-19 -
5 Page |
Páginas | Total 6 Páginas | |
PDF Descargar | [ Datasheet TMM2068AD-45.PDF ] |
Número de pieza | Descripción | Fabricantes |
TMM2068AD-45 | STATIC RAM | Toshiba |
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