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PDF TMM2068AP Data sheet ( Hoja de datos )

Número de pieza TMM2068AP
Descripción STATIC RAM
Fabricantes Toshiba 
Logotipo Toshiba Logotipo



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No Preview Available ! TMM2068AP Hoja de datos, Descripción, Manual

TOSHIBA MOS MEMORY PRODUCT
4,096 WORD X 4 BIT STATIC RAM
SILICON MONOLITHIC
N-CHANNEL SILICON GATE MOS PROCESS
DESCRIPTION
TMM2068AP-25, TMM2068AP-35
TMM2068AP-45
The TMM2068AP is a 16,384 bits high speed and low power static random access memory
organized as 4,096 words by 4 bits and operates from a single 5V supply.
Toshiba's high performance device technology provides both high speed and low power
features with a maximum access time of 25ns/35ns/45ns and maximum operating current
of l35/l20/l20mA. When CS goes high, the device is deselected and placed in a low
power standby mode in which maximum standby current is 20mA.
Thus the TMM2068AP is most suitable for us in cache memory and high speed storage.
The T~ill2068AP is offered in a 20 pin standard plastic package with 0.3 inch width for
high density assembly.
The TMM2068AP is fabricated with ion implanted N channel silicon gate MOS technology
for high performance and high reliability.
FEATURES
• Fast access time
tAcc=25ns: TMM2068AP-25
tAcc=35ns: TMM2068AP-35
tACC=45ns: T~ill2068AP-45
• Low power dissipation
ICC=135mA: TMM2068AP-25
ICC=120mA: TMM2068AP-35
ICC=120mA: T~lli2068AP-45
I SB=20mA
• Single 5V power supply
• Fully static operation
• All inputs and outputs: Directly TTL compatible
• Power down feature
CS=VIH
• Three state outputs
• Inputs protected: All inputs protection aganist
static charge.
• Package: 20 pins standard plastic package,
0.3 inch width.
BLOCK DIAGRAt-1
PIN CONNECTION
A7
A6
A5
A4
A3
A2
Al
AO
Cs
OND
(TOP VIEW)
Vee
AS
A9
AIO
All
1/01
1/02
1/03
1/04
WE
A 5 ""-,--,,,,....-r---.
A6 n...+....rr-r-....,
A7 n...+....rr-r--,
AS n...+....rr-r--,
A9 n...+.....rr-r--,
Al0 o-t--a:::r=::I
Alln-+-rr-r--,
MEMORY
CELL ARRAY
(l28X32/4 )
---0 Vee
---oOND
I/OIo-~~~--~~~r-~------~~~~~----~
I/02O-~~>-+-Jlr-.-.
1/0:3 o--fl+-£)--f-..II
I/O 4 o--fl+t-£)--f-..J
PIN NA~1ES
AO'VAll
1/01 'V 1/04
CS
WE
VCC
GND
Address Inputs
Data Input/Output
Chip Select Input
\~rite Enable Input
Power (+5V)
Ground
es
es o-t---.q ..
WEO-r--~J
CS AO Al A2 A3 A4
- C-21 -

1 page




TMM2068AP pdf
WRITE CYCLE 2.
ADDRESSES
TMM2068AP-25, TMM2068AP-35
TMM2068AP-45
twc
DOUT
DIN
tDS
DATA IN STABLE
Note 1. In read cycle 2, all addresses are valid prior to or coincident with
CS transition low.
2. The operating temperature (Ta) is guaranteed with transverse air flow
exceeding 400 linear feet per minute.
- C-25 -

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