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TMM27128ADI 데이터시트 PDF




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부품번호 TMM27128ADI 기능
기능 UV ERASABLE AND ELECTRICALLY PROGRAMMABLE READ ONLY MEMORY
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TMM27128ADI 데이터시트, 핀배열, 회로
TOSHIBA MOS MEMORY PRODUCT
16,3B4 WORD X B BIT UV ERASABLE AND ELECTRICALLY
PROGRAMMABLE READ ONLY MEMORY
N·CHANNEL SILICON STACKED GATE MOS
TMM27128ADI-15
TMM27128ADI-20
DESCRIPTION
TheTMM27128ADI isa 16,384 word x 8 bit ultra-
violet light erasable and electrically programmable
read only memory. For read operation, the TM M
27128ADI's access time is 150ns/200ns, and the
TMM2 7128ADI operates from a single 5-volt power
supply and has a low power standby mode which
reduces the power dissipation without increasing
access time.
The standby mode is achieved by applying a TIL-
high level signal to the CE input.
For program operation, the program is achieved
by using the high speed programming mode.
The TMM2 7128ADI is fabricated with the N-
channel silicon double layer gate MOS technolgy.
FEATURES
Vee
tAee
1eC2
leel
-15
150ns
I
5V±5%
I
100mA
30mA
-20
200ns
• Wide operating temparature range -40-85'C
• Full static operation
• High speed programming mode
• Single location programming
• Three state outputs
• Inputs and outputs TIL compatible
o Pin compatible with i2 7128 A
PIN CONNECTION (TOP VIEW)
Vpp
A5
A4-
AO
00
°1
°2
GND
vcc
PGM
A13
AS
Ag
All
OE
Ala
CE
°7
06
°5
04-
°3
PIN NAMES
Ao-AI3
00-07
CE
OE
PGM
Vpp
Vee
GND
Address Inputs
Outputs (Inputs)
Chip Enable Input
Output Enable Input
Program Control Input
Program Supply Voltage
Vee Supply Voltage (+ 5V)
Ground
BLOCK DIAGRAM
Vpp OND Vee
AO
Al
A2
A3
A4
A5
A6
A7
A8
A9
AIO
All
A12
A13
MODE SELECTION
~MODE
iPGM CE OE Vpp Vee
00-07
(27) (20) (22) (1) (28) (11-13.15-19)
Read
HL L
Data Out
Output
Deselect
* * H 5V 5V High Impedance
Standby
Program
Program
Inhibit
*H*
*L L ~
High Impedance
Data In
* *H High Impedance
12.5V 6V
HLH
High Impedance
Program
Verify
HL L
* :Note
H or L
Data Out
- 0-39 -
POWER
Active
Standby
Active




TMM27128ADI pdf, 반도체, 판매, 대치품
TMM27128ADI-15
TMM27128ADI-20
HIGH SPEED PROGRAM OPERATION
D. C. RECOMMENDED OPERATING CONDITIONS
SYMBOL
VIH
VIL
Vee
Vpp
PARAMETER
Input High Voltage
Input .Low Voltage
V(e Power Supply Voltage
Vpp Power Supply Voltage
MIN.
2.2
-0.3
5.75
12.0
TYP
-
-
6.0
12.5
MAX.
Vee+ 1.0
0.8
6.25
13.0
UNIT
V
V
V
V
D. C. and OPERATING CHARACTERISTICS (Ta=25±5'C. Vee=6V±0.25V. Vpp=12.5V±0.5V)
SYMBOL
III
VOH
VOL
Ice
IpP2
VIO
PARAMETER
Input Current
Output High Voltage
Output Low Voltage
Vee Supply Current
Vpp Supply Current
A9 Auto Select Voltage
TEST CONDITION
VIN=O-Vce
IOH= -400)iA
IOL=2. 1mA
-
Vpp= 13.0V
-
MIN. TYP. MAX.
- - ±10
2.4 -
--
-
0.4
- -- 120
- - 50
11.5 12.0 12.5
UNIT
)iA
V
V
mA
mA
V
A. C. PROGRAMMING CHARACTERISTICS (Ta=25±5'C. Vcc=6V±0.25V. Vpp=12.5V±0.5V)
SYMBOL
tAS
tAH
teEs
tCEH
tos
tDH
tvs
tpw
topw
tPRT
tPFT
tOE
tDF2
PARAMETER
Address Setup Time
Address Hold Time
CE Setup Time
CE Hold Time
Data Setup Time
Data Hold Time
Vpp Setup Time
Program Pulse Width
Additional Program Pulse Width
Program pulse Rise Time
Program Pulse Fall Time
OE to Output Valid Valid
OE to Output is High-Z
TEST CONDITION
-
-
-
-
-
-
-
-
Note 1
-
-
-
CE=VIL
A. C. TEST CONDITIONS
• Output Load
• Input Pulse Rise and Fall Times
• Input Pulse Levels
• Timing Measurement Reference Level
1 TIL Gate and CL (1 OOpF)
10ns Max.
0.45V to 2.4V
Input 0.8V and 2.0V. Output 0.8V and 2.0V
MIN. TYP. MAX.
2-
-
2-
2-
2-
2-
2-
-
-
-
-
-
2-
-
0.95 1.0 1.05
2.85 3 78.75
5-
-
5-
-
- - 100
- - 90
UNIT
)is
)is
)is
)is
)is
)is
)is
ms
ms
ns
ns
ns
ns
- 0-42 -

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TMM27128ADI 전자부품, 판매, 대치품
TMM27128ADI-15
TM M27128AD 1-20
STANDBY MODE
The TMM27128ADI has a low power standby mode
conntrolled by the CE signal.
By applying a TIL high level to the CE input, the
TM M27128ADI is placed in the standby mode which
PROGRAM MODE
Initially, when received by customers, all bits of the
TMM27128ADI are in the "1" state which is the
erased state.
The programming operation introduces "Os" data
into the desired bit locations by electrical program-
PROGRAM VERIFY MODE
The verify mode is to check that the desired data is
correctly programmed on the programmed bits.
PROGRAM INHIBIT MODE
Under the condition that the program voltage (+
12.5V) is applied to Vpp termmal, a high level CE or
PGM input inhibits the TMM27128ADI from being
programmed.
Programming of two or more TMM27128ADI's in
parallel with different data is easily accomplished:
HIGH SPEED PROGRAMMING MODE
The program time can be greatly decreased by
using this high speed programming mode. The
device is set up in the high speed programming
mode when the programming voltage (+ 12. 5V) is
applied to the Vpp terminal with Vee = 6V and PGM =
VIH.
The programming is achieved by applying a single
TIL low level 1ms pulse the PGM mput after addres-
ses and data are stable. Then the programmed data
is verified by using Program Verify Mode.
If the programmed data is not correct, another
reduces 70% of operating current. The outputs are
then in a high impedence state, independent of the
OE and the PGM inputs.
mingo
The levels required for all inputs are TIL.
The TM M27128ADI can be programmed at any
location, anytime - either individually, sequentially or
at random.
The verify is accomplished with OE and CE at VIL
and PGM at VIH.
That is, all inputs except for CE or PGM may be
commonly connected, and a TTL low level program
pulse is applied to the CE and PGM of the desired
device only and TIL high level signal is applied to the
other devices.
program pulse of 1ms is applied and then pro-
grammed data is verified. This should be repeated
until the program operates correctly (max. 25 times)
After correctly programming the selected
address, one additional program pulse with pulse
width 3 times that needed for prowamming is
applied.
When programming has been completed, the
data in all addresses should be verified with Vec=Vpp
=5V.
- 0-45 -

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