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PDF TMM27128ADI-15 Data sheet ( Hoja de datos )
| Número de pieza | TMM27128ADI-15 | |
| Descripción | UV ERASABLE AND ELECTRICALLY PROGRAMMABLE READ ONLY MEMORY | |
| Fabricantes | Toshiba | |
| Logotipo |  |
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TOSHIBA MOS MEMORY PRODUCT
16,3B4 WORD X B BIT UV ERASABLE AND ELECTRICALLY
PROGRAMMABLE READ ONLY MEMORY
N·CHANNEL SILICON STACKED GATE MOS
TMM27128ADI-15
TMM27128ADI-20
DESCRIPTION
TheTMM27128ADI isa 16,384 word x 8 bit ultra-
violet light erasable and electrically programmable
read only memory. For read operation, the TM M
27128ADI's access time is 150ns/200ns, and the
TMM2 7128ADI operates from a single 5-volt power
supply and has a low power standby mode which
reduces the power dissipation without increasing
access time.
The standby mode is achieved by applying a TIL-
high level signal to the CE input.
For program operation, the program is achieved
by using the high speed programming mode.
The TMM2 7128ADI is fabricated with the N-
channel silicon double layer gate MOS technolgy.
FEATURES
Vee
tAee
1eC2
leel
-15
150ns
I
5V±5%
I
100mA
30mA
-20
200ns
• Wide operating temparature range -40-85'C
• Full static operation
• High speed programming mode
• Single location programming
• Three state outputs
• Inputs and outputs TIL compatible
o Pin compatible with i2 7128 A
PIN CONNECTION (TOP VIEW)
Vpp
A5
A4-
AO
00
°1
°2
GND
vcc
PGM
A13
AS
Ag
All
OE
Ala
CE
°7
06
°5
04-
°3
PIN NAMES
Ao-AI3
00-07
CE
OE
PGM
Vpp
Vee
GND
Address Inputs
Outputs (Inputs)
Chip Enable Input
Output Enable Input
Program Control Input
Program Supply Voltage
Vee Supply Voltage (+ 5V)
Ground
BLOCK DIAGRAM
Vpp OND Vee
AO
Al
A2
A3
A4
A5
A6
A7
A8
A9
AIO
All
A12
A13
MODE SELECTION
~MODE
iPGM CE OE Vpp Vee
00-07
(27) (20) (22) (1) (28) (11-13.15-19)
Read
HL L
Data Out
Output
Deselect
* * H 5V 5V High Impedance
Standby
Program
Program
Inhibit
*H*
*L L ~
High Impedance
Data In
* *H High Impedance
12.5V 6V
HLH
High Impedance
Program
Verify
HL L
* :Note
H or L
Data Out
- 0-39 -
POWER
Active
Standby
Active
1 page  
TMM27128ADI-15
TM M27128AD 1-20
TIMING WAVEFORMS (READ)
~ADDRESSES
tAS
CE \\\\\\'~\-
~
~
\
to
J
tAH
tCEH
HUNKNOWN
tOE
H f -DIN
STABLE
~ K D OVUALTID
DIN STABLE
tDS tDH
I
UPaM
tpFT
tpRT
~
Vpp !///!;'/jJ
tDF2 tDS
·1
I tOPW
/
~
\
PROGRAM
PROGRAM
VERIFY
PROGRAM
tDH
C
--iifjjjiL
J
INITIAL PROGRAM
ADDITIONAL PROGRAM
Note: 1. Vee must be applied simultaneously or before Vpp and cut off simultaneously or after VPP.
2. Removing the device from socket and setting the device in socket with Vpp= 12. 5V may cause permanent
damage to the device.
3. The Vpp supply voltage is permitted up to 14V for program operation. so the voltage over 14V should not be
applied to the Vpp terminal.
When the switching pulse voltage is applied to the Vpp terminal. the overshoot voltage of its pulse should not
be exceeded 14V.
- D-43 -
5 Page | ||
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