Datasheet.kr   

UM2147 PDF 데이터시트 : 부품 기능 및 핀배열

부품번호 UM2147
기능 4K x 1 High Speed NMOS SRAM
제조업체 UMC
로고 UMC 로고 



전체 5 페이지

		

No Preview Available !

UM2147 데이터시트, 핀배열, 회로
SUMO
UM2147
High Speed NMOS SRAM
Features
• 45 ns maximum access time
• No clocks or strobes required
• Automatic CE power down
• Identical cycle and access times
• Single +5V supply 10%)
• Pinout and function compatible to SY2147
• Total TTL compatible:
All inputs and outputs
• Separate data input and output
• High density 18-pin package
• Three-state output
General Description
The UMC UM2147 is a 4096-Bit Static Random Access
Memory organized 4096 words by 1-bit and is fabricated
using UMC's new scaled N-channel silicon gate technology.
It is designed using fully static circuitry, therefore requiring
no clock or refreshing to operate. Address set-up times
are not required and the data is read out non-destructively
with the same polarity as the input data. Separate data
input and output pins provide maximum design flexibility.
The three-state output facilitates memory expansion by
allowing the outputs to be OR-tied to other devices.
The UM2147 offers an automatic power down feature.
Power down is controlled by the Chip Enable input. When
Chip Enable (CE) goes high, thus deselecting the UM2147
the device will automatically power down and r€main
in a standby power mode as long as CE remain high. This
unique feature provides system level power savings as
much as 80%.
The UM2147 is packaged in an 18-pin DIP for the highest
possible density. The device is fully TTL compatible and
has a si ngle +5V. power supply.
Pin Configuration
Block Diagram
A1 - V C C
_GND
AO
A1
A2
A3
A4
As
DOUT
WE
GND
vcc
ROW
SELECT
MEMORY ARRAY
64 ROWS
64 COLUMNS
A6
A7 As
As
A9
A10
DIN ------I.~
All
DIN
CE
CE - -.....-11-,
2-3




UM2147 pdf, 반도체, 판매, 대치품
UM2147
Timing Diagrams
READ CYCLE NO.1 (NOTES 3 AND 4)
ADDRESS
~________________t_RC_______________:i_._____________
~tOH~:I.
~
XX~DATA OUT PREV IOUS DATA VALiD ~:::::::::::::D:A:T:A:V:A:L:I:D:::::::::::::::
READ CYCLE NO.2 (NOTES 3 AND 5)
tRC
~k-
tACE
DATA OUT
VSCUCPPLY ICC
XX! - - - t L Z
HIGH IMPEDANCE T
:V
~I--tpu
------
-~ jr
I
CURRENT I S S - - - - - - - - 50%
DATA VALID
--"10-
-tHZ
,
HIGH
IMPEDANCE
-tPD5~-----
WRITE CYCLE NO.1 (WE CONTROLLED) (NOTE 6)
twc
..
ADDRESS
CE
WE
DATA IN
DATA OUT
) ~~
tcw
...
\ \ \ ~k-
~ il
tAW
tAS - - j
\:\
,- t w P _ _ . . --tWR--
r
t= - t o w
DATA VALID
I
tDH
~
//L/I/
DATA UNDEFINED
i--twz-
I--tow-
" HIGH IMPEDANCE
Notes:
1. Chip deselected for greater than 55 ns prior to selection.
2. Chip deselected for a finite time that is less than 55ns prior to selection. (If the deselect time is Qns, the chip is by
definition selected and access occurs according to Read Cycle No.1.).
3. WE is high for Read Cycles.
4. Device is continuously selected, CE = VI L.
5. Addresses valid prior to or coincident with CE transition low.
6. If CE goes high simultaneously with WE high, the outputs remain in the high impedancestate.
7. Transition is measured ± 500mV from low or high impedance voltage with load B. This parameter is sampled and not
100% tested.
8. The operating ambient temperature range is guaranteed with transverse air flow exceeding 400 linear feet per minute;
9. A pullup resistor to Vce on the CE input is required to keep the device deselected: otherwise, power-on current ap-
proaches Ice active.
10. A minimum 0.5 ms time delay is required after application of VCC (+5V) before proper device operation is achieved.
2-6

4페이지













구       성총 5 페이지
다운로드[ UM2147.PDF 데이터시트 ]
구매 문의
일반 IC 문의 : 샘플 및 소량 구매
-----------------------------------------------------------------------

전력 반도체 판매 ( IGBT, TR 모듈, SCR, 다이오드 모듈 )

휴대전화 : 010-3582-2743


상호 : 아이지 인터내셔날

전화번호 : 051-319-2877, [ 홈페이지 ]



링크공유

링크 :

관련 데이터시트

부품번호상세설명 및 기능제조사
UM2147

4K x 1 High Speed NMOS SRAM

UMC
UMC
UM2148

1K x 4 High Speed NMOS SRAM

UMC
UMC

DataSheet.kr    |   2019   |  연락처   |  링크모음   |   검색  |   사이트맵