|
|
Número de pieza | UM2148 | |
Descripción | 1K x 4 High Speed NMOS SRAM | |
Fabricantes | UMC | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de UM2148 (archivo pdf) en la parte inferior de esta página. Total 5 Páginas | ||
No Preview Available ! (DUMO
========= UM2148
1K x 4 High Speed NMOS SRAM
Features
• 45 ns maximum access time
• No cloS;ks or strobes required
• Automatic CE power down
• Identical cycle and access times
• Single+5V supply (± 10%)
• Pinout and function compatible to SY2148
• Industry standard 2114 pinout
• Totally TTL compatible all inputs and outputs
• Common data input and output
• High density 18-pin package
• Three-state output
General Description
The UMC UM2148 is a 4096-Bit Static Random Access
Memory organized 1024 words by 4 bits and is fabricated
using UMC's new scaled N-channel silicon.gate technology.
It is designed using fully static circuitry, therefore requiring
no clock or' refreshing to operate. Address set-up times are
not required and the data is read out non-destructively
with the same polarity as the input data. Common data
input and output pins provide maximum design flexibility.
The three-state output facilitates memory expansion by
allowing the outputs to be OR-tied to other devices.
The UM2148 offers an automatic power down feature.
Power down is controlled by the Chip Enable input. When
Chip Enable (CE) goes high, thus deselecting the UM2148
the device will automatically power down and remain in
a standby power mode as long as CE remains high. This
unique feature provides system level power savings as
much as 85%.
The UM2148 is packaged in an 18-pin DIP for ~he highest
possible density. The device is fully TTL compatible and
has a single +5V power supply.
Pin Configuration
Block Diagram
ROW
SELECT
MEMORY ARRAY
64 ROWS
64COLUMNS
-VCC
4-'--- GND
2-8
1 page (l)UMC
UM2148
WR ITE CYCLE NO.2 (CE CONTROLLED) (NOTE 6)
.
ADDRESS -....,...I~
twc
i--tAS-
tcw
~~
.
-"~ )"-
tAW
I-twP
\\\\\\\\\\\~~
tow
~tWR-
Jif- / / / / / / / / /
tDH
DATA IN
~~
DATA VALID
}~
DATA OUT
DATA UNDEFINED
I--twz-
,
1
HIGH IMPEDANCE
A.C. Testing Input, Output Waveform
A.C. Testing Load Circuit
3.0V
OV
1.5V TEST
..- POINTS
INPUT
2.0V
<
0.8V
OUTPUT
A.C. TESTING: INPUTS ARE DR IVEN AT 3.0V FOR A
LOGIC "1" AND O.OV FOR A LOGIC "0". TIMING MEAS-
UREMENTS ARE MADE AT 2.0V FOR A LOGIC "1" AND
0.8V FOR A LOGIC "0" AT THE OUTPUTS. THE INPUTS
ARE MEASURED AT 1.5V. INPUT RISE AND FALL TIMES
ARE 5 ns.
+5V
480n
DOUT - .......----. 30pF
255n
(INCLUDING
SCOPE AND
JIG)
=
LOAD A.
Ordering Information
Part
Number
UM2148
UM2148-1
UM2148-2
UM2148L
UM2148L-1
Access
Time
(Max.)
70 ns
55 ns
45 ns
70 ns
55 ns
Operating
Current
(Max.)
150 mA
150 mA
150mA
125mA
125mA
Standby
Current
(Max.)
30mA
30mA
30mA
20mA
20mA
Package
Type
Plastic
Plastic
Plastic
Plastic
Plastic
2-12
5 Page |
Páginas | Total 5 Páginas | |
PDF Descargar | [ Datasheet UM2148.PDF ] |
Número de pieza | Descripción | Fabricantes |
UM2147 | 4K x 1 High Speed NMOS SRAM | UMC |
UM2148 | 1K x 4 High Speed NMOS SRAM | UMC |
UM2149 | 1K x 4 High Speed NMOS SRAM | UMC |
Número de pieza | Descripción | Fabricantes |
SLA6805M | High Voltage 3 phase Motor Driver IC. |
Sanken |
SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
Analog Devices |
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |