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UM8051 데이터시트 PDF




UMC에서 제조한 전자 부품 UM8051은 전자 산업 및 응용 분야에서
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부품번호 UM8051 기능
기능 Single Chip 8-Bit Microcomputer
제조업체 UMC
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UM8051 데이터시트, 핀배열, 회로
eUMC UMBOS1 / UMB031
======::::Single Chip 8-Bit Microcomputer
Features
• 4K x BROM
• 128 x 8 RAM
• Four 8-bit ports, 32 I/O lines
• Two 16-bit timer/event counters
• High-performance full-duplex serial channel
• External memory expandable to 128K
• Boolean processor
• UM8048 architecture enhanced with:
• Non-paged jumps
• Direct addressing
• Four 8-register banks
• Stack depth up to 128 -bytes
• Multiply, divide, subtract, compare
• Most instructions execute in 1~s
4~s multiply and divide
General Description
The UM8051/8031 is a stand-alone, high-performance
single-chip computer fabricated with UMC's highly-reliable
+5 Volt, NMOS technology and packaged in a 40-pin DIP.
It provides the hardware features, architectural enhance-
ments and new instructions that are necessary to make
it a. powerful·and cost effective controller for applications
requiring up to 64K bytes of program memory and/or up
to 64K bytes of data storage.
The UM8051/8031 contains a non-volatile 4K x 8 read-
only program memory, a volatile 128 x 8 read/write data
memory; 32 I/O lines; two 16-bit timer/counters; a five-
source, two-priority-Ievel. nested interrupt structure; a
serial I/O port for either mUlti-processor communications,
I/O expansion, or full duplex UART; and on-chip oscillator
and clock circuits. The UM8031 is identical, except that
it lacks the program memory. For systems. that req.u ire
extra capability, theUM8051 can be expanded using
standard TTL compatible memories.
The UM8051 microcomputer, like its UM8048 predecessor,
is efficient both as a controller and as an arithmetic pro-
cessor. The UM8051 has extensive facilities for binary and
BCD arithmetic and excels in bit-handling capabilities.
Efficient use of program memory results from an instruc-
tion set consisting of 44% one-byte, 41% two-byte, and
15% three-byte instructions. With a 12 MHz crystal, 58%
of the instructions execute in 1~s, 40% in 2~s and multiply
and divide require only 4~s. Among the many instructions
added to the standard UM8048 instruction set are multiply,
divide, subtract and compare.
Pin Configuration
Pl.0
Pl.l
Pl.2
1'1.3
Pl.4
Pl.5
Pl.6
P1.7
RST
RXD/P3.0
TXD/P3.1
INTO/P3.2
TN'i'T/P3.3
TO/P3.4
Tl/P3.4
WR/P3.6
RD/P3.7
XTAL2
XTALl
VSS
Vcc
!,!O.O/ADO
PO.l/ADl
PO.2/AD2
PO.3/AD3
PO.4/AD4
PO.5/AD5
PO.6/AD6
PO.7/AD7
EA
ALE
PSEN
P2.7/A15
P2.6/A14
P2.5/A13
P2.4/A 12
P2.3/All
P2.2/Al0
P2.1/A9
P2.0/A8
Logic Symbol
RST
EA
PSEN
ALE
Uz'J
~~TRXXDD_-~
:J INTO- "'-
u. INT1_ I-
«~ TO- ~
T l - Cl.
6o WR--
RD-
~
U'J
<=>PORT
o
ADDRESS
AND
DATA BUS
PORT
PORT ~ ADDRESS
2 t-y
BUS
3-14




UM8051 pdf, 반도체, 판매, 대치품
Absolute Maximum Ratings*
Ambient Temperature Under Bias ........ OoC to 70°C
Storage Temperature . . . . . . . . . . . . . -65°C to + 150°C
Voltage on Any Pin With Respect to
Ground (VSS) .......... .
-0.5Vto+7V
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . 1 Watts
UMBOS 1 / UMB031
*Comments
Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device.
These are stress ratings only. Functional operation of
this device at these or any other conditions above those
indicated in the operational sections of this specification
is not implied and exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
D. C. Characteristics
(TA = ooc to 70°C; Vee = 5V ± 10%; Vss = OV)
Symbol
VI L
VIH
VIHl
VOL
VOLl
VOH
VOHl
ilL
IIL2
III
IIH1
ICC
CIO
Parameter
Input Low Voltage
Input High Voltage (Except RST and XTAL2)
Input High Voltage to RST For Reset. XT AL2
Output Low Voltage Ports 1,2,3 (Note 1)
Output Low Voltage Port 0, ALE, PSEN
(Note 1)
Output High Voltage Ports 1,2,3
Output High Voltage Port 0, ALE, PSEI'J
Log ical 0 Input Cu rrent Ports 1, 2, 3
Logical 0 Input Current for XT AL2
Input Leakage Current To Port 0, EA
Input High Current to RST/VPD For Reset
Power Supply Current
Capacitance of I/O Buffer
Min.
-0.5
20
2.5
2.4
2.4
Max.
0.8
Vee + 0.5
Vee + 0.5
0.45
0.45
-800
-2.5
±10
500
125
10
Units
V
V
V
V
V
V
V
pA
mA
pA
pA
mA
pF
Test Conditions
XTALl to VSS
10L= 1.5mA
10L = 3.2mA
10H = -BOpA
10 H = -400pA
Vin = 0.45V
XTAL 1 = VSS, Vin = 0.45V
< <0.45V Vin Vee
<Vin Vee -1.5V
All outputs disconnected
fc = 1 MHz, TA = 25°C
Note: VOL is degraded when the 8031/8051 rapidly discharges external capacitance. This AC noise is most pronounced
during emission of address data. When using external memory, locate the latch or buffer as close to the 8031/8051
as possible.
A.C. Characteristics
(TA = ooc to 70°C, Vee = 5V ± 10%, Vss = OV, CL for Port 0, ALE and PSEN Outputs = 100 pF; CL for all other
outputs = 80 pF)
EXTERNAL PROGRAM MEMORY CHARACTERISTICS
Symbol
TLHLL
TAVLL
.TLLAX
TLLlV
TLLPL
TPLPH
TPLIV
TPXIX
TPXIZ
TPXAV
TAVIV
TAZPL
Parameter
ALE Pu Ise Width
Address Setup to ALE
Address Hold After ALE
ALE to Valid Instr In
ALE To PSEN
PSEN Pulse Width
PSEN To Valid Instr In
Input Instr Hold After PSEN
Input Instr Float After PSEN
Address Valid After PSEN
Address To Valid Instr In
Address Float To PSEN
12 MHz 1Clock
Min.
127
43
48
58
215
0
75
0
Max.
233
125
53
302
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Variable Clock
1/TCLCL = 3.5 MHz to 12 MHz
Min.
Max.
Units
2TCLCL-40
ns
TCLCL-40
ns
TCLCL-35
ns
4TCLCL-100
ns
TCLCL-25
ns
3TCLCL-35
ns
3TCLCL-125
ns
0 ns
TCLCL-20
ns
TCLCL-8
ns
5TCLCL-115
ns
0 ns
3-17

4페이지










UM8051 전자부품, 판매, 대치품
Clock Waveforms
UMB051 / UMB031
INTERNAL
CLOCK
STATE 4
IP1 P2
STATE 5
IP1 P2
STATE 6
IP1 P2
STATE 1
IP1 P2
STATE 2
IP1 P2
STATE 3
IP1 P2
STATE 4
IP1 P2
STATE 5
IP1 P2
XTAL2
ALE
EXTERNAL PROGRAM MEMORY FETCH'
~I I I L1......._______----1
THESE SIGNALS ARE NOT
ACTIVATED DURING THE
EXECUTION OF A MOVX INSTRUCTION
I\ 1
PO
P2(EXT)
READ CYCLE
RD
INDICATES ADDRESS TRANSIONS
DOH IS EMITTED
PCL OUT (IF P80GRAM
DURING THIS PERIOD
MEMORY IS EXTERNAL)
PO DPL OR RI
,':4 S="~D-----"'.lOUT
FLOAT
\L
P2
WRITE CYCLE
WR
PO
P2
INDI.cATf:S OPH OR P2 SFR TO PCH TRANSITIONS
I~------------
PCL OUT (EVEN IF PROGRAM
MEMORY IS INTERNAL)
DPL OR RI
OUT
--.~II ~--'-\-.~, f · L••.I...-.=--=--=--=--=--=--=--=--=--=--=--=--:...-O-A-TA-O-U-T--------------------
PCL OUT (I F PROG RAM
I MEMORY IS EXTERNAL)
INDICATES DPH OR P2 SFR TO PCH TRANSITIONS
PORT OPERASTION
MOV PORT SRC
IOLD DATA NEW DATA
PO PINS SAMPLED
~--------------------------- ~~-----MOVDEST,PO
MOV DEST PORT (P1 P2 P3)
(INCLUDES INTO, INT1, TO, T1)
t::::I...
PO~P~IN-S S-A-MP-LE-D ---_--------------------_I . , L---
SERIAL PORT SHIFT CLOCK
TXD
(MODE 0)
P1, P2, P3 PINS SAMPLED
RXD SAMPLED
~~N~2S:~PLED
I~
RXD SAMPLED
This diagram indicates when signals are clocked internally,
The time it takes the signals to propagate to the pins,
however, ranges from 25 to 15 ns. This propagation
delay is dependent on variables ~such as temperature and
pin .Ioading. Propagation also varies from output to output
and component to component. Typically though, (TA =
25°C, fully loaded) RD and WR propagation delays are
approximately 50 ns. The other signals are typically 85 ns.
Propagation delays are incorporated in the AC specifica-
tions.
3-20

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