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UM2681-2 PDF 데이터시트 : 부품 기능 및 핀배열

부품번호 UM2681-2
기능 Dual Asynchronous Receiver/Transmitter
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UM2681-2 데이터시트, 핀배열, 회로
(l)UMC
,===========Dual UM2681 SERIES
Wfi1 TArsaynnscmhirtotenro(uDsURAeRcTe)iver/
Features
• Dual full-duplex asynchronous receiver/transmitter
• Ouadruple buffered receiver data registers
• Programmable data format
5 to 8 data bits plus parity
Odd, even, no parity or force parity
1, 1.5 or 2 stop bits programmable in 1/16 bit
increments'
• Programmable baud rate for each receiver and
transmiter' selectable from:
18 fixed rates: 50 to 38.4K baud
One user defined rate derived from programmable
timer/counter
External 1x or 16x clock
• Parity, framing, and overrun error detection
• False start bit detection
• Line break detection and generation
• Programmable channel mode
Normal (full duplex)
Automatic echo
Localloopback
Remote loopback
• Multi-function programmable 16-bit counter/timer
• Multi-function 7-bit input port
- Can serve as clock or control inputs
- Change of state detection on four inputs
• Multi-function 8-bit output port
Individual bit set/reset capability
- Outputs can be programmed to be status/interrupt
signals
• Versatile interrupt system
Single interrupt output with eight maskable inter-
rupting conditions
Output port can be configured to provide a total of
up to six separate wire-OR'able interrupt outputs
• Maximum data transfer: 1X-l MB/sec, 16X-125KB/sec
• Automatic wake-up mode for multidrop applications
• Start-end break interrupt/status
• Detects break which originates in the middle of a
character
• On-chip crystal oscillator
• TTL compatible
• Single +5V power supply
General Description
The UM2681 Dual Universal Asynchronous Receiver/
Transmitter (DUART) is a single chip NMOS-LSI com-
munications device that provides two independent full-
duplex asynchronous receiver/transmitter channels in a
single package. It interfaces directly with microprocessors
and may be used in a polled or interrupt driven system.
The operating mode and data format of each channel can
be programmed independently. Additionally, each receiver
and transmitter can select its operating speed as one of
eighteen fixed baud rates, a 16X clock derived from a
programmable counter/timer, or an external 1X or 16X
Pin Configuration
clock. The baud rate generator and counter/timer can
operate directly from a crystal or from external clock
inputs. The ability to independently program the operating
speed 'of the receiver and transmitter make the DUART
particularly attractive for dual-speed channel applications
such as clustered terminal systems.
Each receiver is quadruply buffered to minimize the
potential of receiver overrun or to reduce interrupt over-
head in interrupt driven systems. In addition, a flow
control capability is provided to disable a remote DUART
transmitter when the buffer of the receiving device is full.
OP2
OP4
OP6
DO
02
04
06
INTRN
AO
Al
A2
A3
WRN
RON
RXOB
TXOB
OPl
01
03
05
07
GNO
VCC
IP2
CEN
RESET
X2
Xl/CLK
RXOA
TXOA
OPO
DO
02
04
D6
INTRN
Al
A2
A3
WRN
RON
RXOB
TXOB
01
03
05
07
GNO
7-18
AO
Vcc
CEN
RESET
Kl/CLK
RXOA
TXOA
DO
02
04
06
INTRN




UM2681-2 pdf, 반도체, 판매, 대치품
UM2681 SERIES
Parameter
Tentative Limits
Min. Typ.
Max.
Port Timing (Figure 3)
tps Port input setup time before RON low
tpH Port input hold time after RON high
tpD Port output valid after WRN high
0
0
400
Interrupt Timing (Figure 4)
tlR INTRN (or OP3-0P7 when used as interrupts) high from:
Read RHR (RXROY IFFU LL interrupt)
Write TH R (TX RDY interrupt)
Reset command (delta break interrupt)
Stop CIT command (counter interrupt)
Read IPCR (input port change interrupt)
Write IMR (clear of interrupt mask bit)
300
300
300
300
300
300
Clock Timing (Figure 5)
tCLK
tCLK
tCTC
fCTC
Xl ICLK high or low time
Xl IC L K frequency
CTCLK (IP2) high or low time
CTCLK (IP2) frequency
tRx high or low time
fRX RxC frequency (16X)
(lX)
tTX TxC high or low time
f TX TxC frequency (16X)
(lX)
100
2.0 3.6864
100
0
220
0
0
220
0
0
4.0
4.0
2.0
1.0
2.0
1.0
Transmitter Timing (Figure 6)
tTXD TxO output delay from TxC low
tTCS TxC output skew from TxO output data
Receiver Timing (Figure 7)
tRXS RxO data setup time to RxC high
tRXH RxD data hold time from RxC high
0
240
200
350
150
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
ns
MHz
ns
MHz
MHz
ns
MHz
MHz
ns
ns
ns
ns
7-21

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UM2681-2 전자부품, 판매, 대치품
I)UMC
UM2681 SERIES
RxD
RECEIVER
ENABLED
RxRDY
(SRO)
FFUL
(SR1)
----------1------------
RxRDY FFULL _ _ _ _ __.
(OP5)2
RON
STATUS DATA
0,-""--'
OVERRUN
(SR4) -----------------------------~----~~
RTSl
(OPO)
OP,RIO)=l
Figure 9. Receiver Timing
Notes: 1. Timing shown for MR1(7)=1.
2. Shown for OPCR(4)=1 and MR(6)=O.
MASTER STATION
BIT9
DIT9
BIT9
I I ioI L--r-TxD
fOO#!d
'DO
I f)~_______~~.:-~-,
II
II
ENABLED
T1~~~ ~..TRANSMITTER
:
..
I
I;
r f,-I..~..~_....
WRN . f ----------~)~)~--~---------------
MR1(4-3)=11 ADD#l MR1(2)=0 DO
MR1(2)=1
MR1(2)=1 ADD#2
PERIPHERAL STATION
I I HIIS(T9
RxD ---,
10
.......a.-_""-"
BIT9
FOO#l ,I
BIT9
BIT9
u. : l ! ...DO
.jo_l,l!,
f=-t
"f-r.- - - - - - - - I ) j - - - - . J
j
FOO#2 l
~f-r--..,.......-I'f'-
1......_ ..1.0"",1
REENCAEBIVLERD _ _ _ _ _ _ _ _ _ _ _ _ _ I
~---~
I
I,
II iL----
,~::: u---------~ADD-#l -,LSTuATU=S DIAT>A f-:--------~....,;~
DO
ADo#2
Figure 10. Wake Up Mode
7-24

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