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PDF MC74VHC32 Data sheet ( Hoja de datos )

Número de pieza MC74VHC32
Descripción Quad 2-Input OR Gate
Fabricantes ON Semiconductor 
Logotipo ON Semiconductor Logotipo



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MC74VHC32
Quad 2-Input OR Gate
The MC74VHC32 is an advanced high speed CMOS 2−input OR
gate fabricated with silicon gate CMOS technology. It achieves high
speed operation similar to equivalent Bipolar Schottky TTL while
maintaining CMOS low power dissipation.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output. The
inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V
systems to 3.0 V systems.
Features
High Speed: tPD = 3.8 ns (Typ) at VCC = 5.0 V
Low Power Dissipation: ICC = 2.0 mA (Max) at TA = 25°C
High Noise Immunity: VNIH = VNIL = 28% VCC
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Designed for 2.0 V to 5.5 V Operating Range
Low Noise: VOLP = 0.8 V (Max)
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300 mA
ESD Performance:
Human Body Model > 2000 V;
Machine Model > 200 V
Chip Complexity: 48 FETs or 12 Equivalent Gates
These Devices are Pb−Free and are RoHS Compliant
1
A1
2
B1
3
Y1
4
A2
5
B2
9
A3
10
B3
6
Y2
Y = A+B
8
Y3
12
A4
13
B4
11
Y4
Figure 1. Logic Diagram
VCC B4 A4 Y4 B3 A3 Y3
14 13 12 11 10 9 8
http://onsemi.com
14
1
SOIC−14
D SUFFIX
CASE 751A
MARKING
DIAGRAMS
14
VHC32G
AWLYWW
1
14
1
TSSOP
DT SUFFIX
CASE 948G
14
VHC
32
ALYW G
G
1
A = Assembly Location
WL, L = Wafer Lot
Y = Year
WW, W = Work Week
G or G = Pb−Free Package
(Note: Microdot may be in either location)
FUNCTION TABLE
Inputs
Output
AB
Y
LL
LH
HL
HH
L
H
H
H
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
1234567
A1 B1 Y1 A2 B2 Y2 GND
(Top View)
Figure 2. Pinout: 14−Lead Packages
© Semiconductor Components Industries, LLC, 2014
September, 2014 − Rev. 7
1
Publication Order Number:
MC74VHC32/D

1 page




MC74VHC32 pdf
MC74VHC32
PACKAGE DIMENSIONS
14
H
1
0.25 M B M
D
e
SOIC−14
CASE 751A−03
ISSUE K
A
B
8
E
7
13X b
0.25 M C A S
BS
A
A1
C
SEATING
PLANE
L
DETAIL A
h
X 45 _
M
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b DOES NOT INCLUDE DAMBAR
A3 PROTRUSION. ALLOWABLE PROTRUSION
SHALL BE 0.13 TOTAL IN EXCESS OF AT
MAXIMUM MATERIAL CONDITION.
4. DIMENSIONS D AND E DO NOT INCLUDE
MOLD PROTRUSIONS.
5. MAXIMUM MOLD PROTRUSION 0.15 PER
SIDE.
DETAIL A
MILLIMETERS INCHES
DIM MIN MAX MIN MAX
A 1.35 1.75 0.054 0.068
A1 0.10 0.25 0.004 0.010
A3 0.19 0.25 0.008 0.010
b 0.35 0.49 0.014 0.019
D 8.55 8.75 0.337 0.344
E 3.80 4.00 0.150 0.157
e 1.27 BSC
0.050 BSC
H 5.80 6.20 0.228 0.244
h 0.25 0.50 0.010 0.019
L 0.40 1.25 0.016 0.049
M 0_ 7_ 0_ 7_
SOLDERING FOOTPRINT*
6.50
1
14X
1.18
14X
0.58
1.27
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
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