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USB3250 데이터시트 PDF




Microchip에서 제조한 전자 부품 USB3250은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


PDF 형식의 USB3250 자료 제공

부품번호 USB3250 기능
기능 Hi-Speed USB Device Transceiver
제조업체 Microchip
로고 Microchip 로고


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USB3250 데이터시트, 핀배열, 회로
USB3250
Hi-Speed USB Device Transceiver with UTMI Interface
Highlights
• USB-IF "Hi-Speed" certified to USB 2.0 electrical
specification
• Interface compliant with the UTMI specification
(60MHz 8-bit unidirectional interface or 30MHz
16-bit bidirectional interface)
• Supports 480Mbps High Speed (HS) and 12Mbps
Full Speed (FS) serial data transmission rates
• Integrated 45and 1.5ktermination resistors
reduce external component count
• Internal short circuit protection of DP and DM
lines
• On-chip oscillator operates with low cost 12MHz
crystal
• Robust and low power digital clock and data
recovery circuit
• SYNC and EOP generation on transmit packets
and detection on receive packets
• NRZI encoding and decoding
• Bit stuffing and unstuffing with error detection
• Supports the USB suspend state, HS detection,
HS Chirp, Reset and Resume
• Support for all test modes defined in the USB 2.0
specification
• Draws 72mA (185mW) maximum current con-
sumption in HS mode - ideal for bus powered
functions
• On-die decoupling capacitance and isolation for
immunity to digital switching noise
• Available in a 56-pin VQFN package
• Full industrial operating temperature range from
-40oC to +85oC (ambient)
Applications
The Universal Serial Bus (USB) is the preferred inter-
face to connect Hi-Speed PC peripherals.
• Digital Still and Video Cameras
• MP3 Players
• External Hard Drives
• Scanners
• Entertainment Devices
• Printers
• Test and Measurement Systems
• POS Terminals
• Set Top Boxes
2013 - 2016 Microchip Technology Inc.
DS00002142A-page 1




USB3250 pdf, 반도체, 판매, 대치품
USB3250
1.0 GENERAL DESCRIPTION
The USB3250 provides the Physical Layer (PHY) interface to a USB 2.0 Device Controller. The IC is available in a 56-
pin VQFN.
The USB3250 is a USB 2.0 physical layer transceiver (PHY) integrated circuit. Microchip's proprietary technology
results in low power dissipation, which is ideal for building a bus powered USB 2.0 peripheral. The PHY can be config-
ured for either an 8-bit unidirectional or a 16-bit bidirectional parallel interface, which complies with the USB Transceiver
Macrocell Interface (UTMI) specification. It supports 480Mbps transfer rate, while remaining backward compatible with
USB 1.1 legacy protocol at 12Mbps.
All required termination for the USB 2.0 Transceiver is internal. Internal 5.25V short circuit protection of DP and DM lines
is provided for USB compliance.
While transmitting data, the PHY serializes data and generates SYNC and EOP fields. It also performs needed bit stuff-
ing and NRZI encoding. Likewise, while receiving data, the PHY de-serializes incoming data, stripping SYNC and EOP
fields and performs bit un-stuffing and NRZI decoding.
DS00002142A-page 4
2013 - 2016 Microchip Technology Inc.

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USB3250 전자부품, 판매, 대치품
USB3250
4.0 INTERFACE SIGNAL DEFINITION
TABLE 4-1: SYSTEM INTERFACE SIGNALS
Name
Direction Active Level
Description
RESET
XCVRSELECT
TERMSELECT
SUSPENDN
CLKOUT
OPMODE[1:0]
LINESTATE[1:0]
DATABUS16_8
Input
Input
Input
Input
Output
Input
Output
Input
High
Reset. Reset all state machines. After coming out of reset, must
wait 5 rising edges of clock before asserting TXValid for transmit.
Assertion of Reset: May be asynchronous to CLKOUT.
De-assertion of Reset: Must be synchronous to CLKOUT unless
RESET is asserted longer than two periods of CLKOUT.
N/A Transceiver Select. This signal selects between the FS and HS
transceivers:
0: HS transceiver enabled
1: FS transceiver enabled.
N/A Termination Select. This signal selects between the FS and HS
terminations:
0: HS termination enabled
1: FS termination enabled
Low Suspend. Places the transceiver in a mode that draws minimal
power from supplies. Shuts down all blocks not necessary for
Suspend/Resume operation. While suspended, TERMSELECT
must always be in FS mode to ensure that the 1.5k pull-up on
DP remains powered.
0: Transceiver circuitry drawing suspend current
1: Transceiver circuitry drawing normal current
Rising Edge
System Clock. This output is used for clocking receive and
transmit parallel data at 60MHz (8-bit mode) or 30MHz (16-bit
mode). When in 8-bit mode, this specification refers to CLKOUT
as CLK60. When in 16-bit mode, CLKOUT is referred to as
CLK30.
N/A Operational Mode. These signals select between the various
operational modes:
[1] [0] Description
0 0 0: Normal Operation
0 1 1: Non-driving (all terminations removed)
1 0 2: Disable bit stuffing and NRZI encoding
1 1 3: Reserved
N/A Line State. These signals reflect the current state of the USB data
bus in FS mode, with [0] reflecting the state of DP and [1]
reflecting the state of DM. When the device is suspended or
resuming from a suspended state, the signals are combinatoria.
Otherwise, the signals are synchronized to CLKOUT.
[1] [0] Description
0 0 0: SE0
0 1 1: J State
1 0 2: K State
1 1 3: SE1
N/A Databus Select. Selects between 8-bit and 16-bit data transfers.
0 8-bit data path enabled. VALIDH is undefined. CLKOUT =
60MHz.
1: 16-bit data path enabled. CLKOUT = 30MHz.
2013 - 2016 Microchip Technology Inc.
DS00002142A-page 7

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