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부품번호 | IRFD120 기능 |
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기능 | Power MOSFET ( Transistor ) | ||
제조업체 | Vishay | ||
로고 | |||
전체 9 페이지수
Power MOSFET
IRFD120, SiHFD120
Vishay Siliconix
PRODUCT SUMMARY
VDS (V)
RDS(on) ()
Qg (Max.) (nC)
Qgs (nC)
Qgd (nC)
Configuration
100
VGS = 10 V
16
4.4
7.7
Single
D
0.27
HVMDIP
S
G
D
G
S
N-Channel MOSFET
ORDERING INFORMATION
Package
Lead (Pb)-free
SnPb
FEATURES
• Dynamic dV/dt Rating
• Repetitive Avalanche Rated
• For Automatic Insertion
• End Stackable
• 175 °C Operating Temperature
• Fast Switching
• Ease of Paralleling
• Compliant to RoHS Directive 2002/95/EC
Available
RoHS*
COMPLIANT
DESCRIPTION
Third generation Power MOSFETs from Vishay provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and
cost-effectiveness.
The 4 pin DIP package is a low cost machine-insertable
case style which can be stacked in multiple combinations on
standard 0.1" pin centers. The dual drain serves as a thermal
link to the mounting surface for power dissipation levels up
to 1 W.
HVMDIP
IRFD120PbF
SiHFD120-E3
IRFD120
SiHFD120
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
Drain-Source Voltage
VDS
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain Currenta
VGS at 10 V
TA = 25 °C
TA = 100 °C
VGS
ID
IDM
Linear Derating Factor
Single Pulse Avalanche Energyb
Repetitive Avalanche Currenta
Repetitive Avalanche Energya
EAS
IAR
EAR
Maximum Power Dissipation
Peak Diode Recovery dV/dtc
TA = 25 °C
PD
dV/dt
Operating Junction and Storage Temperature Range
TJ, Tstg
Soldering Recommendations (Peak Temperature)
for 10 s
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. VDD = 25 V, starting TJ = 25 °C, L = 22 mH, Rg = 25 , IAS = 2.6 A (see fig. 12).
c. ISD 9.2 A, dI/dt 110 A/μs, VDD VDS, TJ 175 °C.
d. 1.6 mm from case.
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 91128
S10-2462-Rev. C, 08-Nov-10
LIMIT
100
± 20
1.3
0.94
10
0.0083
100
1.3
0.13
1.3
5.5
- 55 to + 175
300d
UNIT
V
A
W/°C
mJ
A
mJ
W
V/ns
°C
www.vishay.com
1
IRFD120, SiHFD120
Vishay Siliconix
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 7 - Typical Source-Drain Diode Forward Voltage
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
TA = 25 °C
TJ = 175 °C
SINGLE PULSE
Fig. 8 - Maximum Safe Operating Area
www.vishay.com
4
Document Number: 91128
S10-2462-Rev. C, 08-Nov-10
4페이지 IRFD120, SiHFD120
Vishay Siliconix
D.U.T.
+
-
Peak Diode Recovery dV/dt Test Circuit
+ Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
-
-+
Rg
• dV/dt controlled by Rg
+
• Driver same type as D.U.T.
• ISD controlled by duty factor “D”
- VDD
• D.U.T. - device under test
Driver gate drive
P.W.
Period
D=
P.W.
Period
VGS = 10 Va
D.U.T. lSD waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
Re-applied
voltage
Body diode forward drop
Inductor current
Ripple ≤ 5 %
Note
a. VGS = 5 V for logic level devices
Fig. 14 - For N-Channel
VDD
ISD
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91128.
Document Number: 91128
S10-2462-Rev. C, 08-Nov-10
www.vishay.com
7
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부품번호 | 상세설명 및 기능 | 제조사 |
IRFD120 | Power MOSFET ( Transistor ) | Vishay |
IRFD120 | 1.3A/ 100V/ 0.300 Ohm/ N-Channel Power MOSFET | Intersil Corporation |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |