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EM48AM1644LBB 데이터시트 PDF




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부품번호 EM48AM1644LBB 기능
기능 256Mb Synchronous DRAM
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EM48AM1644LBB 데이터시트, 핀배열, 회로
eorex
Preliminary
EM48AM1644LBB
256Mb (4M×4Bank×16) Synchronous DRAM
Features
• 2 x 4 banks x 2 Mbit x 16 organisation ( Two
128MBit chips stacked in multi-chip package)
• Fully Synchronous to Positive Clock Edge
• Single 1.8V ±0.1V Power Supply
• LVCMOS Compatible with Multiplexed Address
• Programmable Burst Length –1/2/4/8/ full Page
• Programmable CAS Latency (C/L) - 2 or 3
• Data Mask (DQM) for Read / Write Masking
• Programmable Wrap Sequence
– Sequential (B/L = 1/2/4/8/full Page)
– Interleave (B/L = 4/8)
• Burst Read with Single-bit Write Operation
• Deep Power Down Mode.
• Auto Refresh and Self Refresh
• Special Function Support.
– PASR (Partial Array Self Refresh)
– Auto TCSR (Temperature Compensated Self
Refresh)
• Programmable Driver Strength Control
– Full Strength or 1/2, 1/4 of Full Strength
• 4,096 Refresh Cycles / 64ms (15.625us)
Description
The EM48AM1684LBB is Synchronous Dynamic
Random Access Memory (SDRAM) organized as
2 x 4 banks x 2 Mbit by 16 bits. All inputs and
outputs are synchronized with the positive edge of
the clock.
The 256Mb SDRAM uses synchronized pipelined
architecture to achieve high speed data transfer
rates and is designed to operate at 1.8V low power
memory system. It also provides auto refresh with
power saving / down mode. All inputs and outputs
voltage levels are compatible with LVCMOS.
Available packages:TFBGA 54B 12mm x 8mm.
Ordering Information
Part No
EM48AM1644LBB-75F
EM48AM1644LBB-75FE
Organization
2 die X 8M X 16
2 die X 8M X 16
Max. Freq
133MHz @CL3
133MHz @CL3
Package
Grade Pb
TFBGA -54B Commercial Free
TFBGA -54B Extend temp. Free
Jul. 2006
* EOREX reserves the right to change products or specification without notice.
www.eorex.com
1/19




EM48AM1644LBB pdf, 반도체, 판매, 대치품
eorex
Preliminary
EM48AM1644LBB
Absolute Maximum Rating
Symbol
Item
Rating
Units
VIN, VOUT
Input, Output Voltage
-0.3 ~ +4.6
V
VDD, VDDQ
Power Supply Voltage
-0.3 ~ +4.6
V
TOP Operating Temperature Range
Commercial
Extended
0 ~ +70
-25 ~ +85
°C
TSTG
Storage Temperature Range
-55 ~ +150
°C
PD Power Dissipation
1W
IOS Short Circuit Current
50 mA
Note: Caution Exposing the device to stress above those listed in Absolute Maximum Ratings could
cause permanent damage. The device is not meant to be operated under conditions outside the
limits described in the operational section of this specification. Exposure to Absolute Maximum
Rating conditions for extended periods may affect device reliability.
Capacitance (VCC=3.3V, f=1MHz, TA=25°C)
Symbol
Parameter
Min. Typ. Max. Units
CCLK
CI
CO
Clock Capacitance
Input Capacitance for CLK, CKE, Address,
/CS, /RAS, /CAS, /WE, DQML, DQMU
Input/Output Capacitance
4
4
6
8 pF
8 pF
10 pF
Recommended DC Operating Conditions (TA=0°C ~+70°C)
Symbol
Parameter
VDD Power Supply Voltage
VDDQ
Power Supply Voltage (for I/O Buffer)
VIH Input Logic High Voltage
VIL Input Logic Low Voltage
Note: * All voltages referred to VSS.
* VIH (max.) = VDDQ +1.5V for pulse width 3ns
* VIL (min.) = -1.0V for pulse width 3ns
Min. Typ. Max. Units
1.65 1.8 1.95 V
1.65 1.8 1.95 V
0.8*VDD
-0.3
VDD+0.3
0.3
V
V
Jul. 2006
www.eorex.com
4/19

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EM48AM1644LBB 전자부품, 판매, 대치품
eorex
Preliminary
AC Operating Test Conditions
(VDD=3.3V±0.3V, TA=0°C ~70°C)
Item
Output Reference Level
Output Load
Input Signal Level
Transition Time of Input Signals
Input Reference Level
EM48AM1644LBB
Conditions
0.5*VDDQ / 0.5* VDDQ
See diagram as below
0.9*VDDQ / /0.2V
1ns
VDDQ/2
AC Operating Test Characteristics
(VDD=3.3V±0.3V, TA=0°C ~70°C)
Symbol
Parameter
-7.5
Units
Min. Max.
tCK Clock Cycle Time
CL=3 7.5
CL=2 10
ns
tAC Access Time form CLK
CL=3
CL=2
6
ns
8
tCH CLK High Level Width
3 ns
tCL CLK Low Level Width
tOH Data-out Hold Time
CL=3
CL=2
3
2.2
2.2
ns
ns
Data-out High Impedance CL=3
tHZ Time (Note 5)
CL=2
7
ns
9
tLZ Data-out Low Impedance Time
1.5
ns
tIH Input Hold Time
1.5 ns
tIS Input Setup Time
2.5 ns
* All voltages referenced to VSS.
Note 5: tHZ defines the time at which the output achieve the open circuit condition and is not referenced to
output voltage levels.
Jul. 2006
www.eorex.com
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EM48AM1644LBB

256Mb Synchronous DRAM

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