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KSZ8864RMNUB 데이터시트 PDF




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부품번호 KSZ8864RMNUB 기능
기능 Integrated 4-Port 10/100 Managed Switch
제조업체 Microchip
로고 Microchip 로고


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KSZ8864RMNUB 데이터시트, 핀배열, 회로
KSZ8864CNX/RMNUB
Integrated 4-Port 10/100 Managed Switch with
Two MACs MII or RMII Interfaces
Features
Advanced Switch Features
• IEEE 802.1q VLAN Support for up to 128 VLAN
Groups (Full-Range 4096 of VLAN IDs)
• Static MAC Table Supports up to 32 Entries
• VLAN ID Tag/Untagged Options, Per Port Basis
• IEEE 802.1p/q Tag Insertion or Removal on a Per
Port Basis Based on Ingress Port (Egress)
• Programmable Rate Limiting at the Ingress and
Egress on a Per Port Basis
• Jitter-Free Per Packet Based Rate Limiting Sup-
port
• Broadcast Storm Protection with Percentage Con-
trol (Global and Per Port Basis)
• IEEE 802.1d Rapid Spanning Tree Protocol RSTP
Support
• Tail Tag Mode (1 Byte Added Before FCS) Sup-
port at Port 4 to Inform the Processor Which
Ingress Port Receives the Packet
• 1.4 Gbps High-Performance Memory Bandwidth
and Shared Memory Based Switch Fabric with
Fully Non-Blocking Configuration
• Dual MII/RMII with MAC 3 SW3-MII/RMII and
MAC 4 SW4-MII/RMII Interfaces
• Enable/Disable Option for Huge Frame Size up to
2000 Bytes Per Frame
• IGMP v1/v2 Snooping (IPv4) Support for Multicast
Packet Filtering
• IPv4/IPv6 QoS Support
• Support Unknown Unicast/Multicast Address and
Unknown VID Packet Filtering
• Self-Address Filtering
Comprehensive Configuration Register Access
• Serial Management Interface (MDC/MDIO) to All
PHYs Registers and SMI Interface (MDC/MDIO)
to All Registers
• High-Speed SPI (up to 25 MHz) and I2C Master
Interface to all Internal Registers
• I/O Pins Strapping and EEPROM to Program
Selective Registers in Unmanaged Switch Mode
• Control Registers Configurable on the Fly (Port-
Priority, 802.1p/d/q, AN…)
QoS/CoS Packet Prioritization Support
• Per Port, 802.1p and DiffServ-Based
• 1/2/4-Queue QoS Prioritization Selection
2016 Microchip Technology Inc.
• Programmable Weighted Fair Queuing for Ratio
Control
• Re-Mapping of 802.1p Priority Field Per Port
Basis
Integrated 4-Port 10/100 Ethernet Switch
• New Generation Switch with Four MACs and Four
PHYs that are Fully Compliant with the IEEE
802.3u Standard
• Non-Blocking Switch Fabric Ensures Fast Packet
Delivery by Utilizing a 1K MAC Address Lookup
Table and a Store-and-Forward Architecture
• On-Chip 64Kbyte Memory for Frame Buffering
(Not Shared with 1K Unicast Address Table)
• Full-Duplex IEEE 802.3x Flow Control (PAUSE)
with Force Mode Option
• Half-Duplex Back Pressure Flow Control
• HP Auto MDI/MDI-X and IEEE Auto Crossover
Support
• LinkMD® TDR-Based Cable Diagnostics to Iden-
tify Faulty Copper Cabling
• MII Interface of MAC Supports Both MAC Mode
and PHY Mode
• Per Port LED Indicators for Link, Activity, and 10/
100 Speed
• Register Port Status Support for Link, Activity,
Full-/Half-Duplex and 10/100 Speed
• On-Chip Terminations and Internal Biasing Tech-
nology for Cost Down and Lowest Power Con-
sumption
Switch Monitoring Features
• Port Mirroring/Monitoring/Sniffing: Ingress and/or
Egress Traffic to Any Port or MII/RMII
• MIB Counters for Fully Compliant Statistics Gath-
ering 34 MIB Counters Per Port
• Loopback Support for MAC, PHY, and Remote
Diagnostic of Failure
• Interrupt for the Link Change on Any Ports
Low-Power Dissipation
• Full-Chip Software Power-Down and Per Port
Software Power-Down
• Energy-Detect Mode Support <0.1W Full-Chip
Power Consumption When All Ports Have No
Activity
• Very-Low Full-Chip Power Consumption (~0.3W),
without Extra Power Consumption on Transform-
ers
DS00002229A-page 1




KSZ8864RMNUB pdf, 반도체, 판매, 대치품
KSZ8864CNX/RMNUB
Table of Contents
1.0 Introduction ..................................................................................................................................................................................... 5
2.0 Pin Description and Configuration ................................................................................................................................................... 6
3.0 Functional Description ................................................................................................................................................................... 15
4.0 Register Descriptions .................................................................................................................................................................... 38
5.0 Operational Characteristics ........................................................................................................................................................... 77
6.0 Electrical Characteristics ............................................................................................................................................................... 78
7.0 Timing Diagrams ............................................................................................................................................................................ 80
8.0 Reset Circuit................................................................................................................................................................................... 89
9.0 Selection of Isolation Transformer ................................................................................................................................................. 90
10.0 Package Outline........................................................................................................................................................................... 91
Appendix A: Data Sheet Revision History ........................................................................................................................................... 92
The Microchip Web Site ...................................................................................................................................................................... 93
Customer Change Notification Service ............................................................................................................................................... 93
Customer Support ............................................................................................................................................................................... 93
Product Identification System .............................................................................................................................................................. 94
DS00002229A-page 4
2016 Microchip Technology Inc.

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KSZ8864RMNUB 전자부품, 판매, 대치품
KSZ8864CNX/RMNUB
TABLE 2-1: SIGNALS - KSZ8864CNX/RMNUB
Pin
Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Pin
Name
RXP1
RXM1
TXP1
TXM1
VDDA12
GND
ISET
VDDAT
RXP2
RXM2
TXP2
TXM2
VDDAT
INTR_N
VDDC
SM3TXEN
SM3TXD3
SM3TXD2
SM3TXD1
SM3TXD0
Type,
Note
2-1
I
I
O
O
P
GND
P
I
I
O
O
P
OPU
P
IPD
IPD
IPD
IPD
IPD
21
SM3TXC/
SM3REFCLK
I/O
22
VDDIO
P
23
SM3RXC
I/O
24
SM3RXDV/
SM3CRSDV
IPD/O
Port
1
1
1
1
2
2
2
2
3
3
3
3
3
3
3
3
Pin Function, Note 2-2
Physical receive signal + (differential)
Physical receive signal – (differential)
Physical transmit signal + (differential)
Physical transmit signal – (differential)
1.2V analog power
Ground with all grounding of die bottom
Set physical transmit output current. Pull-down with a 12.4 k1%
resistor.
3.3V analog VDD
Physical receive signal + (differential)
Physical receive signal – (differential)
Physical transmit signal + (differential)
Physical transmit signal – (differential)
3.3V analog VDD
Interrupt. This pin is the Open-Drain output pin.
1.2V digital core VDD
MAC3 switch MII/RMII transmit enable
MAC3 switch MII transmit bit 3
MAC3 switch MII transmit bit 2
MAC3 switch MII/RMII transmit bit 1
MAC3 switch MII/RMII transmit bit 0
MAC3 switch MII transmit clock:
Input: SW3-MII MAC mode
Output: SW3-MII PHY mode
Input: SW3-RMII reference clock
3.3V, 2.5V, or 1.8V digital VDD for digital I/O circuitry
MAC3 switch MII receive clock:
Input: SW3-MII MAC mode
Output: SW3-MII PHY mode
Output: SW3-RMII reference clock
Unused RMII clock can be pull-down or disable by Register 87.
SM3RXDV: MAC3 switch SW3-MII receives data valid.
SM3CRSDV: MAC3 switch SW3-RMII carrier sense/receive data
valid.
2016 Microchip Technology Inc.
DS00002229A-page 7

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KSZ8864RMNUB

Integrated 4-Port 10/100 Managed Switch

Microchip
Microchip

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