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IDT709089L PDF 데이터시트 : 부품 기능 및 핀배열

부품번호 IDT709089L
기능 HIGH-SPEED 64K x 8 SYNCHRONOUS DUAL-PORT STATIC RAM
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IDT709089L 데이터시트, 핀배열, 회로
HIGH-SPEED 64K x 8
SYNCHRONOUS
DUAL-PORT STATIC RAM
PRELIMINARY
IDT709089S/L
Features:
x True Dual-Ported memory cells which allow simultaneous
access of the same memory location
x High-speed clock to data access
– Commercial: 9/12/15ns (max.)
x Low-power operation
– IDT709089S
Active: 950mW (typ.)
Standby: 5mW (typ.)
– IDT709089L
Active: 950mW (typ.)
Standby: 1mW (typ.)
x Flow-Through or Pipelined output mode on either port via
the FT/PIPE pin
x Counter enable and reset features
x Dual chip enables allow for depth expansion without
additional logic
x Full synchronous operation on both ports
– 4ns setup to clock and 1ns hold on all control, data,
and address inputs
– Data input, address, and control registers
– Fast 9ns clock to data out in the Pipelined output mode
– Self-timed write allows fast cycle time
– 15ns cycle time, 66MHz operation in the Pipelined
output mode
x TTL- compatible, single 5V (±10%) power supply
x Industrial temperature range (–40°C to +85°C) is available
for selected speeds
x Available in 100-pin Thin Quad Flatpack (TQFP) package
Functional Block Diagram
R/WL
OEL
CE0L
CE1L
1
0
0/1
R/WR
OER
CE0R
1 CE1R
0
0/1
FT/PIPEL
I/O0L - I/O7L
A15L
A0L
CLKL
ADSL
CNTENL
CNTRSTL
0/1 1
0
I/O
Control
I/O
Control
0 1 0/1
Counter/
Address
Reg.
MEMORY
ARRAY
Counter/
Address
Reg.
FT/PIPER
I/O0R - I/O7R
A15R
A0R
CLKR
ADSR
CNTENR
CNTRSTR
3242 drw 01
©2000 Integrated Device Technology, Inc.
1
FEBRUARY 2000
DSC-3242/10




IDT709089L pdf, 반도체, 판매, 대치품
IDT709089S/L
High-Speed 64K x 8 Synchronous Dual-Port Static RAM
Preliminary
Industrial and Commercial Temperature Ranges
Recommended Operating
Recommended DC Operating
Temperature and Supply Voltage(1,2) Conditions
Grade
Ambient
Temperature
GND
Vcc
Commercial
0OC to +70OC
0V
5.0V + 10%
Industrial
-40OC to +85OC
0V
5.0V + 10%
NOTES:
3242 tbl 04
1. This is the parameter TA.
2. Industrial temperature: for specific speeds, packages and powers contact
your sales office.
Symbol
Parameter
Min. Typ. Max. Unit
VCC Supply Voltage
4.5 5.0 5.5 V
GND Ground
0 0 0V
VIH Input High Voltage
2.2 ____ 6.0(1) V
VIL Input Low Voltage
-0.5(2)
____
0.8
V
NOTES:
1. VTERM must not exceed VCC + 10%.
2. VIL > -1.5V for pulse width less than 10ns.
3242 tbl 05
Absolute Maximum Ratings(1)
Symbol
Rating
Commercial
& Industrial
Unit
VTERM(2)
Terminal Voltage
with Respect
to GND
-0.5 to +7.0
V
TBIAS Temperature
Under Bias
-55 to +125
oC
TSTG Storage
Temperature
-55 to +125
oC
IOUT DC Output
Current
50 mA
NOTES:
3242 tbl 06
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may
cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in
the operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reliability.
2. VTERM must not exceed Vcc + 10% for more than 25% of the cycle time or 10ns
maximum, and is limited to < 20mA for the period of VTERM > Vcc + 10%.
Capacitance(1)
(TA = +25°C, f = 1.0MHz)
Symbol
Parameter
Conditions(2)
Max. Unit
CIN Input Capacitance
VIN = 3dV
9 pF
COUT(3) Output Capacitance
VOUT = 3dV
10 pF
NOTES:
3242 tbl 07
1. These parameters are determined by device characterization, but are not
production tested.
2. 3dV references the interpolated capacitance when the input and output
switch from 0V to 3V or from 3V to 0V.
3. COUT also references CI/O.
6.442

4페이지










IDT709089L 전자부품, 판매, 대치품
IDT709089S/L
High-Speed 64K x 8 Synchronous Dual-Port Static RAM
Preliminary
Industrial and Commercial Temperature Ranges
AC Electrical Characteristics Over the Operating Temperature Range
(Read and Write Cycle Timing)(3,4,5) (VCC = 5V ± 10%, TA = 0°C to +70°C)
709089X9
Com'l Only
709089X12
Com'l Only
709089X15
Com'l Only
Symbol
tCYC1
tCYC2
tCH1
tCL1
tCH2
tCL2
tR
tF
tSA
tHA
tSC
tHC
tSW
tHW
tSD
tHD
Parameter
Clock Cycle Time (Flow-Through)(2)
Clock Cycle Time (Pipelined)(2)
Clock High Time (Flow-Through)(2)
Clock Low Time (Flow-Through)(2)
Clock High Time (Pipelined)(2)
Clock Low Time (Pipelined)(2)
Clock Rise Time
Clock Fall Time
Address Setup Time
Address Hold Time
Chip Enable Setup Time
Chip Enable Hold Time
R/W Setup Time
R/W Hold Time
Input Data Setup Time
Input Data Hold Time
Min.
25
15
12
12
6
6
____
____
4
1
4
1
4
1
4
1
Max.
____
____
____
____
____
____
3
3
____
____
____
____
____
____
____
____
Min.
30
20
12
12
8
8
____
____
4
1
4
1
4
1
4
1
Max.
____
____
____
____
____
____
3
3
____
____
____
____
____
____
____
____
Min.
35
25
12
12
10
10
____
____
4
1
4
1
4
1
4
1
Max.
____
____
____
____
____
____
3
3
____
____
____
____
____
____
____
____
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tSAD ADS Setup Time
tHAD ADS Hold Time
tSCN CNTEN Setup Time
tHCN CNTEN Hold Time
tSRST CNTRST Setup Time
tHRST CNTRST Hold Time
tOE Output Enable to Data Valid
tOLZ Output Enable to Output Low-Z(1)
tOHZ Output Enable to Output High-Z(1)
tCD1 Clock to Data Valid (Flow-Through)(2)
tCD2 Clock to Data Valid (Pipelined)(2)
tDC Data Output Hold After Clock High
tCKHZ
Clock High to Output High-Z(1)
tCKLZ Clock High to Output Low-Z(1)
4 ____ 4 ____ 4 ____ ns
1 ____
1 ____
1 ____ ns
4 ____ 4 ____ 4 ____ ns
1 ____
1 ____
1 ____ ns
4 ____ 4 ____ 4 ____ ns
1 ____
1 ____
1 ____ ns
____ 12 ____ 12 ____ 15 ns
2 ____ 2 ____ 2 ____ ns
17
17
1 7 ns
____ 20 ____ 25 ____ 30 ns
____ 9 ____ 12 ____ 15 ns
2 ____ 2 ____ 2 ____ ns
2 9 2 9 2 9 ns
2 ____ 2 ____ 2 ____ ns
Port-to-Port Delay
tCWDD
Write Port Clock High to Read Data Delay
____ 40 ____ 40 ____ 50 ns
tCCS Clock-to-Clock Setup Time
____ 15 ____ 15 ____ 20 ns
NOTES:
3242 tbl 11
1. Transition is measured 0mV from Low or High-impedance voltage with the Output Test Load (Figure 2). This parameter is guaranteed by device
characterization, but is not production tested.
2. The Pipelined output parameters (tCYC2, tCD2) apply to either or both left and right ports when FT/PIPE = VIH. Flow-through parameters (tCYC1, tCD1) apply when
FT/PIPE = VIL for that port.
3. All input signals are synchronous with respect to the clock except for the asynchronous Output Enable (OE) and FT/PIPE. FT/PIPE should be treated as a DC
signal, i.e. steady state during operation.
4. 'X' in part number indicates power rating (S or L).
5. Industrial temperature: for specific speeds, packages and powers contact your sales office.
6.742

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