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ISL68127 데이터시트 PDF




Intersil Corporation에서 제조한 전자 부품 ISL68127은 전자 산업 및 응용 분야에서
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부품번호 ISL68127 기능
기능 PWM Controller
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ISL68127 데이터시트, 핀배열, 회로
DATASHEET
Digital Dual Output, 7-Phase Configurable, PWM
Controller with PMBus
ISL68127
The ISL68127 is a digital dual output, flexible multiphase
(X+Y 7) PWM controller supporting the latest PMBus 1.3
specifications. Either output can be configured to support any
desired phase assignments up to a maximum of seven phases
across the two outputs (X+Y). For example, 6+1, 5+2, 4+2,
3+3, 3+2, or even a single output operation as a 7+0
configuration are supported. The ISL68127 utilizes Intersil’s
proprietary linear synthetic digital current modulation scheme
to achieve the industry’s best combination of transient
response and ease of tuning while addressing the challenges
of modern multiphase designs.
Device configuration and telemetry monitoring is
accomplished using Intersil's intuitive PowerNavigator™ GUI.
The ISL68127 device supports on-chip nonvolatile memory to
store various configuration settings that are user-selectable via
pin-strap, giving system designers increased power density to
configure and deploy multiple configurations. The device
supports an automatic phase add/drop feature to allow
maximum efficiency across all load ranges. Thresholds for
automatic phase add/drop are user-programmable using the
powerful PowerNavigator™ GUI.
The ISL68127 supports a comprehensive fault management
system to enable the design of highly reliable systems. From a
multitiered overcurrent protection scheme, to the configurable
power-good and output overvoltage/undervoltage fault
thresholds and temperature monitoring, virtually any need is
accommodated.
With minimal external components, easy configuration, robust
fault management, and highly accurate regulation capability,
implementing a high-performance, multiphase regulator has
never been easier.
Applications
• Networking equipment
• Telecom/datacom equipment
• Server/storage equipment
• Point-of-load power supply (Memory, DSP, ASIC, FPGA)
Features
• Advanced linear digital modulation scheme
- Zero latency synthetic current control for excellent HF
current balance
- Dual edge modulation for fastest transient response
• Auto phase add/drop for excellent load vs efficiency profile
• PMBus 1.3 support
- Telemetry - VIN, VOUT, IOUT, power IN/OUT, temperature,
and various fault status registers
- Up to 1MHz bus interface
• Flexible phase configuration
- 7+0, 6+1, 5+2, 4+3 phase operation
- Operation using less than 7 phases between 2 outputs is
also supported
• Diode braking for overshoot reduction
• Differential remote voltage sensing supports 0.5% closed
loop system accuracy over load, line and temperature
• Highly accurate current sensing for excellent load line
regulation and accurate OCP
- Supports the ISL99227 60A smart power stage
- Supports DCR sense with integrated temperature
compensation
• Comprehensive fault management enables high reliability
systems
- Pulse-by-pulse phase current limiting
- Total output current protection
- Output and input OV/UV
- Open voltage sense detect
- Black box recording capability for faults
• Intuitive configuration via PowerNavigator™ GUI
- NVM to store up to eight configurations
• Pb-free (RoHS compliant)
Related Literature
• For a full list of related documents, visit our web page
- ISL68127 product page
September 28, 2016
FN8748.0
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2016. All Rights Reserved
Intersil (and design) and PowerNavigator are trademarks owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.




ISL68127 pdf, 반도체, 판매, 대치품
ISL68127
Functional Pin Descriptions Refer to Table 4 on page 19 for design layout considerations.
PIN NUMBER PIN NAME
DESCRIPTION
7, 6, 5, 4, 3, 2, 1 PWM[6:0] Pulse width modulation outputs. Connect these pins to the PWM input pins of 3.3V logic-compatible Intersil smart power
stages, driver IC(s), or power stages.
8, 10
GND Ground pins. Connect directly to system GND plane.
9, 11, 12, 46,
47, 48
DNC Do not connect any signals to these pins.
13 EN0 Input pin used for enable control of Output 0. Active high. Connect to ground if not used.
14 EN1 Input pin used for enable control of Output 1. Active high. Connect to ground if not used.
15 TWARN Thermal warning flag. This open-drain output will be pulled low in the event of a sensed over-temperature at TMON pins
without disabling the regulators. Maximum pull-up voltage is VCC.
16 PG0 Open-drain, power-good indicators for Output 0. Maximum pull-up voltage is VCC.
17 PG1 Open-drain, power-good indicators for Output 1. Maximum pull-up voltage is VCC.
18 SCL Serial clock signal pin for SMBus interface. Maximum pull-up voltage is VCC.
19 SDA Serial data signal pin for SMBus interface. Maximum pull-up voltage is VCC.
20 SALRT Serial alert signal pin for SMBus interface. Maximum pull-up voltage is VCC.
21 CONFIG Configuration ID selection pin. See Table 3 on page 16 for more details.
22 VINSEN Input voltage sense pin. Connect to VIN through a resistor divider (typically 402k/10k) with a 10nF decoupling capacitor.
23 VSEN1 Positive differential voltage sense input for Output 1. Connect to positive remote sensing point. Connect to ground if not
used.
24 RGND1 Negative differential voltage sense input for Output 1. Connect to negative remote sensing point. Connect to ground if not
used.
25, 27, 29, 31, CSRTN[6:0] The CS and CSRTN pins are current sense inputs to individual phase differential amplifiers. Unused phases should have
33, 35, 37
their respective current sense inputs grounded. The ISL68127 supports smart power stage, DCR, and resistor sensing.
26, 28, 30, 32, CS[6:0] Connection details depend on the current sense method chosen.
34, 36, 38
39 RGND0 Negative differential voltage sense input for Output 0. Connect to negative remote sensing point. Connect to ground if not
used.
40 VSEN0 Positive differential voltage sense input for for Output 0. Connect to positive remote sensing point. Connect to ground if
not used.
41 SA PMBus address selection pin. See Table 2 on page 12 for more details.
42 VCC Chip primary bias input. Connect this pin directly to a +3.3V supply with a high quality MLCC bypass capacitor.
43 VCCS Internally generated 1.2V LDO logic supply from VCC. Decouple with 4.7µF or greater MLCC (X5R or better).
44 TMON0 Input pin for external temperature measurement at Output 0. Supports diode based temperature sensing as well as
smart power stage sensing. Refer to “Temperature Compensation” on page 15 for more information.
45 TMON1 Input pin for external temperature measurement at Output 1. Supports diode based temperature sensing as well as
smart power stage sensing. Refer to “Temperature Compensation” on page 15 for more information.
EPAD
GND Package pad serves as GND return for all chip functions. Connect directly to system GND plane with multiple thermal vias.
Driver, DrMOS, and Smart Power Stage Recommendation
INTERSIL PART
NUMBER
ISL99227
ISL99140
ISL6596
ISL6617A
QUIESCENT CURRENT
(mA)
4.85
0.19
0.19
5
GATE
DRIVE VOLTAGE
(V)
5
5
5
N/A
NUMBER OF
DRIVERS
COMMENTS
Single 60A, 5x5 smart power stage
Single 40A, 6x6 DrMOS
Single Connect ISL6596 VCTRL to 3.3V
N/A Phase Doubler with 5V PWM output to be compatible with 60A
DrMOS or with 60A smart power stage. Supports up to a
14-phase design.
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ISL68127 전자부품, 판매, 대치품
ISL68127
Typical Application: 4+3 Configuration with ISL99227 SPS
1k
EN0
PG0
3.3V
4.7µF
VCC
12V
40.2k
10k
VINSEN
0.01µF
ISL68127
RGND0
VSEN 0
VCCS
4.7µF
TMON0
PWM0
CS0
CSRTN0
470pF
100
470pF
PWM1
CS1
CSRTN1
100
470pF
PWM2
CS2
CSRTN2
100
470pF
PWM3
CS3
CSRTN3
100
470pF
TWARN
SCL
SDA
SALRT
SA
CONFIG
PWM4
CS4
CSRTN4
100
470pF
PWM5
CS5
CSRTN5
100
470pF
TMON1
PWM6
CS6
CSRTN6
470pF
100
470pF
100
0.1µF
ISL99227
TMON
PWM
IMON
REFIN
0.1µF
FAULT#
ISL99227
TMON
PWM
IMON
REFIN
0.1µF
FAULT#
ISL99227
TMON
PWM
IMON
REFIN
0.1µF
FAULT#
ISL99227
TMON
PWM
IMON
REFIN
0.1µF
FAULT#
ISL99227
TMON
PWM
IMON
REFIN
0.1µF
FAULT#
ISL99227
TMON
PWM
IMON
REFIN
0.1µF
FAULT#
ISL99227
TMON
PWM
IMON
REFIN
FAULT#
PVCC
VCC
VIN
BOOT
PHASE
GND SW
0.1µF
PVCC
VCC
VIN
BOOT
PHASE
GND SW
0.1µF
PVCC
VCC
VIN
BOOT
PHASE
GND SW
0.1µF
PVCC
VCC
VIN
BOOT
PHASE
GND SW
0.1µF
PVCC
VCC
VIN
BOOT
PHASE
GND SW
0.1µF
PVCC
VCC
VIN
BOOT
PHASE
GND SW
0.1µF
PVCC
VCC
VIN
BOOT
PHASE
GND SW
0.1µF
5V
12V
2x22µF
5V
12V
2x22µF
5V
12V
2x22µF
COUT
5V
12V
2x22µF
5V
12V
2x22µF
5V
12V
2x22µF
COUT
5V
12V
2x22µF
PG1
1k
EN1
RGND1
VSEN 1
FIGURE 3. TYPICAL APPLICATION: 4+3 CONFIGURATION WITH ISL99227 SPS
VOUT0
VOUT1
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