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PDF HX8352-B00 Data sheet ( Hoja de datos )
| Número de pieza | HX8352-B00 | |
| Descripción | TFT Mobile Single Chip Driver | |
| Fabricantes | Himax | |
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DATA SHEET
( DOC No. HX8352-B00-DS )
HX8352-B00(T)
240RGB x 432 dot, 262K color,
with internal GRAM,
TFT Mobile Single Chip Driver
Preliminary version 03 May, 2010
1 page  
HX8352-B00(T)
240RGB x 432 dot, 262K color, with internal
GRAM, TFT Mobile Single Chip Driver
List of Figures
May, 2010
Figure 5.1 Register read/write timing in parallel bus system interface (for I80 series MPU) ............ 32
Figure 5.2 GRAM read/write timing in parallel bus system interface (for I80 series MPU)............... 33
Figure 5.3 Example of I80- system 18-bit parallel bus interface ....................................................... 36
Figure 5.4 Input data bus and GRAM data mapping in 18-bit bus system interface with 18 bit-data
input (“IFSEL0=1” and “BS3, BS2, BS1, BS0=0010” or “IFSEL0=0” and “BS3, BS2, BS1,
BS0=0000”)................................................................................................................................ 36
Figure 5.5 Example of I80 system 16-bit parallel bus interface type I .............................................. 37
Figure 5.6 Example of I80 system 16-bit parallel bus interface type II ............................................. 37
Figure 5.7 Input data bus and GRAM data mapping in 16-bit bus system interface with 18(2+16)
bit-data input (R17H=03h and “IFSEL0=1” and “BS3, BS2, BS1, BS0”=”0000 or 0001”) ......... 38
Figure 5.8 Input data bus and GRAM data mapping in 16-bit bus system interface with 12 bit-data
input (R17H=04h and “IFSEL0=1” and “BS3, BS2, BS1, BS0”=”0000 or 0001”) ...................... 38
Figure 5.9 Input data bus and GRAM data mapping in 16-bit bus system interface with 16 bit-data
input (R17H=05h and “IFSEL0=1” and “BS3, BS2, BS1, BS0”=”0000 or 0001”) ...................... 38
Figure 5.10 Input data bus and GRAM data mapping in 16-bit bus system interface with 18(16+2)
bit-data input (R17H=07h and “IFSEL0=1” and “BS3,BS2, BS1, BS0”=”0000 or 0001”) .......... 38
Figure 5.11 Input data bus and GRAM data mapping in 16-bit bus system interface with 12 bit-data
input (R17H=03h and “IFSEL0=0” and “BS3, BS2, BS1, BS0”=”0010”) ................................... 39
Figure 5.12 Input data bus and GRAM data mapping in 16-bit bus system interface with 12 bit-data
input (R17H=04h and “IFSEL0=0” and “BS3, BS2, BS1, BS0”=”0010”) ................................... 39
Figure 5.13 Input data bus and GRAM data mapping in 16-bit bus system interface with 16 bit-data
input (R17H=05h and “IFSEL0=0” and “BS3, BS2, BS1, BS0”=”0010”) ................................... 39
Figure 5.14 Input data bus and GRAM data mapping in 16-bit bus system interface with 18(12+6)
bit-data input (R17H=06h and “IFSEL0=0” and “BS3, BS2, BS1, BS0”=”0010”) ...................... 39
Figure 5.15 Input data bus and GRAM data mapping in 16-bit bus system interface with 18(16+2)
bit-data input (R17H=07h and “IFSEL0=0” and “BS3, BS2, BS1, BS0”=”0010”) ...................... 40
Figure 5.16 Example of I80 system 9-bit parallel bus interface type I .............................................. 41
Figure 5.17 Example of I80 system 9-bit parallel bus interface type II ............................................. 41
Figure 5.18 Input data bus and GRAM data mapping in 9-bit bus system interface with 18 bit-data
input (R17H=06h and “IFSEL0=1” and “BS3, BS2, BS1, BS0”=”1000”) ................................... 42
Figure 5.19 Input data bus and GRAM data mapping in 9-bit bus system interface with 18 bit-data
input (R17H=06h and “IFSEL0=1” and “BS3, BS2, BS1, BS0”=”0001”) ................................... 42
Figure 5.20 Example of I80-system 8-bit parallel bus interface type I .............................................. 43
Figure 5.21 Example of I80-system 8-bit parallel bus interface type II ............................................. 43
Figure 5.22 Input data bus and GRAM data mapping in 8-bit bus system interface with 12 bit-data
input (R17H=03h and “IFSEL0=1” and “BS3, BS2, BS1, BS0”=”0011 or 0100”) ...................... 44
Figure 5.23 Input data bus and GRAM data mapping in 8-bit bus system interface with 16 bit-data
input (R17H=05h and “IFSEL0=1” and “BS3, BS2, BS1, BS0”=”0011 or 0100”) ...................... 44
Figure 5.24 Input data bus and GRAM data mapping in 8-bit bus system interface with 18 bit-data
input (R17H=06h and “IFSEL0=1” and “BS3, BS2, BS1, BS0”=”0011 or 0100”) ...................... 44
Figure 5.25 Input data bus and GRAM data mapping in 8-bit bus system interface with 12 bit-data
input (R17H=03h and “ IFSEL0=0” and “BS3, BS2, BS1, BS0”=”0011”)................................... 45
Figure 5.26 Input data bus and GRAM data mapping in 8-bit bus system interface with 16 bit-data
input (R17H=05h and “ IFSEL0=0” and “BS3, BS2, BS1, BS0”=”0011”)................................... 45
Figure 5.27 Input data bus and GRAM data mapping in 8-bit bus system interface with 18 bit-data
input (R17H=06h and “ IFSEL0=0” and “BS3, BS2, BS1, BS0”=”0011”)................................... 45
Figure 5.28 Index register read/write timing in 3-wire serial bus system interface ........................... 48
Figure 5.29 Data write timing in 3-wire serial bus system interface.................................................. 49
Figure 5.30 Index register write timing in 4-wire serial bus system interface ................................... 49
Figure 5.31 Index register read timing in 4-wire serial bus system interface........................... 50
Figure 5.32 Data write timing in 4-wire serial bus system interface.................................................. 50
Figure 5.33 DOTCLK cycle ............................................................................................................... 51
Figure 5.34 RGB interface circuit input timing diagram .................................................................... 52
Figure 5.35 RGB mode timing diagram ............................................................................................ 53
Figure 5.36 RGB 18-bit/pixel on 6-bit data width .............................................................................. 56
Himax Confidential
This information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosed
in whole or in part without prior written permission of Himax.
-P.4-
May, 2010
5 Page 
Table 7.25 DGLUT for blue color (1) ............................................................................................... 104
Table 7.26 DGLUT for blue color (2) ............................................................................................... 105
Table 7.27 AC characteristics of tearing effect signal ..................................................................... 108
Table 7.28 Pin information of free running mode .............................................................................119
Table 7.29 Frequency definition of free running mode display ....................................................... 121
Table 7.30 Adoptability of capacitor ............................................................................................ 123
Table 7.31 Characteristics of output pins........................................................................................ 128
Table 7.32 Characteristics of input pins .......................................................................................... 128
Table 8.1 List table of command set page 0 ................................................................................... 131
Table 8.2 List table of command set page 1 ................................................................................... 135
Table 8.3 Power control 8 register................................................................................................... 147
Table 9.1 Maximum layout resistance ............................................................................................. 188
Table 11.1 Absolute maximum ratings............................................................................................. 197
Table 11.2 ESD protection level ...................................................................................................... 197
Table 11.3 DC characteristics.......................................................................................................... 198
Himax Confidential
This information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosed
in whole or in part without prior written permission of Himax.
-P.10-
May, 2010
11 Page | ||
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| PDF Descargar | [ Datasheet HX8352-B00.PDF ] | |
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