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PDF HMC1023LP5E Data sheet ( Hoja de datos )
| Número de pieza | HMC1023LP5E | |
| Descripción | 72 MHz DUAL PROGRAMMABLE LOW PASS FILTER | |
| Fabricantes | Analog Devices | |
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HMC1023LP5E
v01.0113
72 MHz DUAL PROGRAMMABLE
LOW PASS FILTER WITH DRIVER
Typical Applications
The HMC1023LP5E is ideal for:
• Baseband filtering before or after data converters
for point-to-point fixed wireless and cellular
infrastructure transceivers
• Software defined radio applications
• Anti-aliasing and reconstruction filters
• Test and measurement equipment
• ADC driver applications
Functional Diagram
Features
Low Noise Figure: 10 dB
High linearity:
In-Band Output IP3 > +30 dBm
In-Band Output IP2 > +60 dBm
Pre-programmed and/or Programmable Bandwidth:
5 MHz to 72 MHz. (Please see HMC1023LP5E
Ordering Information)
Exceptional 3 dB Bandwidth Accuracy: ±2.5%
Programmable Gain: 0 or 10 dB
Integrated ADC Driver Amplifier
6th order Butterworth Magnitude & Phase Response
Automatic Filter Calibration
Externally Controlled Common Mode Output Level
Filter Bypass Option
Pin & Register Compatible to HMC900LP5E
Read/Write Serial Port Interface (SPI)
32 Lead 5x5 mm SMT Package 25 mm2
General Description
The HMC1023LP5E is a 6th order, programmable
bandwidth, fully calibrated, dual low pass filter. It
features programmable 0 or 10 dB gain and supports
arbitrary bandwidths from 5 MHz to 72 MHz. When
calibrated, the bandwidth is accurate to +/-2.5%. Built-
in filter bypass option enables wider bandwidths while
maintaining programmed gain and common mode
control settings.
Integrated ADC driver, programmable input
impedance, and adjustable output common mode
voltage from 0.9 V to 3 V with 2 Vppd signal, or lower
than 0.9 V common mode with lower signal swing
enables simple interface while achieving maximum
performance. Programmable bias settings enable
performance/power dissipation trade-off optimized for
each application.
Filter calibration is accomplished with any reference
clock rate from 20 to 80 MHz. One time programmable
(OTP) memory offers unsurpassed flexibility allowing
the user “set and forget” parameters like gain and
bandwidth setting.
Housed in a compact 5x5 mm SMT QFN package, the
HMC1023LP5E is pin and register compatible to the
existing HMC900LP5E programmable bandwidth Low
Pass Filter. It requires minimal external components
and provides a low cost alternative to more complicated
switched discrete filter architectures.
The 6th order Butterworth transfer function delivers
superior stop band rejection while maintaining both a
flat passband and minimal group delay variation.
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1 page  
v01.0113
Figure 1. Filter Attenuation
(all Bandwidths) [1]
20
0
5 MHz
-20
-40
72 MHz
-60
-80
-100
0.1
1 10
FREQUENCY (MHz)
5 MHz
7 MHz
10 MHz
14 MHz
20 MHz
100
28 MHz
40 MHz
50 MHz
72 MHz
Bypass
1000
Figure 3. Filter Attenuation, 10dB Gain [1]
20
0
5 MHz
-20
-40
72 MHz
-60
-80
-100
0.1
1 10
FREQUENCY (MHz)
5 MHz
7 MHz
10 MHz
14 MHz
20 MHz
100 1000
28 MHz
40 MHz
50 MHz
72 MHz
Bypass
Figure 5. Noise Figure, 100 Ω Source
Impedance, 1 kΩ Impedance Selected [2]
26
24
22
0 dB Gain
20
18
10 dB Gain
16
14
12
5
7
10 14 20 28 40
FILTER BANDWIDTH (MHz)
50 72
-40 C
+25 C
+85 C
HMC1023LP5E
72 MHz DUAL PROGRAMMABLE
LOW PASS FILTER WITH DRIVER
Figure 2. Filter Passband Gain Response
0.3
0.2
0.1
0
-0.1
-0.2
5 MHz
-0.3
-0.4
72 MHz
-0.5
0.1
1 10 100
FREQUENCY (MHz)
1000
5 MHz
7 MHz
10 MHz
14 MHz
20 MHz
28 MHz
40 MHz
50 MHz
72 MHz
Figure 4. Filter 3 dB Cutoff vs
Temperature, 10 MHz Bandwidth
5
0
-3 dB
-5
-10
5
6 7 8 9 10
FREQUENCY (MHz)
-40 C
25 C
20
85 C
Figure 6. Noise Figure, 1 kΩ Source
Impedance, 1 kΩ Impedance Selected [2]
24
20
0 dB Gain
16
12
10 dB Gain
8
57
10 14 20 28 40
FILTER BANDWIDTH (MHz)
50 72
[1] Degrated stop-band rejection at frequencies > 100 MHz caused by the test fixture.
[2] 1 kΩ input impedance into the HMC1023LP5E selected by writing Reg 02h[10]=0 and Reg 01h[9] = 0.
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4
5 Page 
v01.0113
Outline Drawing
HMC1023LP5E
72 MHz DUAL PROGRAMMABLE
LOW PASS FILTER WITH DRIVER
NOTES:
[1] PACKAGE BODY MATERIAL: LOW STRESS INJECTION MOLDED PLASTIC
SILICA AND SILICON IMPREGNATED.
[2] LEAD AND GROUND PADDLE MATERIAL: COPPER ALLOY.
[3] LEAD AND GROUND PADDLE PLATING: 100% MATTE TIN.
[4] DIMENSIONS ARE IN INCHES [MILLIMETERS].
[5] LEAD SPACING TOLERANCE IS NON-CUMULATIVE.
[6] PAD BURR LENGTH SHALL BE 0.15mm MAX. PAD BURR HEIGHT SHALL
BE 0.25m MAX.
[7] PACKAGE WARP SHALL NOT EXCEED 0.05mm
[8] ALL GROUND LEADS AND GROUND PADDLE MUST BE SOLDERED TO
PCB RF GOUND.
[9] REFER TO HITTITE APPLICATION NOTE FOR SUGGESTED PCB LAND
PATTERN.
Table 5. Package Information
Part Number
Package Body Material
HMC1023LP5E RoHS-compliant Low Stress Injection Molded Plastic
[1] Max peak reflow temperature of 260 °C
[2] 4-Digit lot number XXXX
Lead Finish
100% matte Sn
MSL Rating [1]
MSL1
Package Marking [2]
H1023
XXXX
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10
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet HMC1023LP5E.PDF ] | |
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