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PDF AD5791 Data sheet ( Hoja de datos )
| Número de pieza | AD5791 | |
| Descripción | Voltage Output DAC | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Data Sheet
FEATURES
1 ppm resolution
1 ppm INL
7.5 nV/√Hz noise spectral density
0.19 LSB long-term linearity stability
<0.05 ppm/°C temperature drift
1 µs settling time
1.4 nV-sec glitch impulse
Operating temperature range: −40°C to +125°C
20-lead TSSOP package
Wide power supply range up to ±16.5 V
35 MHz Schmitt triggered digital interface
1.8 V compatible digital interface
APPLICATIONS
Medical instrumentation
Test and measurement
Industrial control
High end scientific and aerospace instrumentation
1 ppm 20-Bit,
±1 LSB INL, Voltage Output DAC
AD5791
FUNCTIONAL BLOCK DIAGRAM
VCC
VDD
VREFPF VREFPS
IOVCC
SDIN
SCLK
SYNC
SDO
LDAC
CLR
RESET
AD5791
INPUT
SHIFT
REGISTER
AND
CONTROL
LOGIC
20
DAC 20
REG
20-BIT
DAC
6.8kΩ 6.8kΩ
A1 R1 RFB RFB
INV
VOUT
6kΩ
POWER-ON-RESET
AND CLEAR LOGIC
DGND
VSS
AGND VREFNF VREFNS
Figure 1.
Table 1. Complementary Devices
Part No.
Description
AD8675
Ultra precision, 36 V, 2.8 nV/√Hz rail-to-rail
output op amp
AD8676
Ultra precision, 36 V, 2.8 nV/√Hz dual rail-to-
rail output op amp
ADA4898-1
High voltage, low noise, low distortion, unity
gain stable, high speed op amp
Table 2. Related Device
Part No.
Description
AD5781
18-bit, 0.5 LSB INL, voltage output DAC
GENERAL DESCRIPTION
The AD57911 is a single 20-bit, unbuffered voltage-output DAC
that operates from a bipolar supply of up to 33 V. The AD5791
accepts a positive reference input in the range 5 V to VDD − 2.5 V
and a negative reference input in the range VSS + 2.5 V to 0 V.
The AD5791 offers a relative accuracy specification of ±1 LSB
max, and operation is guaranteed monotonic with a ±1 LSB
DNL maximum specification.
The part uses a versatile 3-wire serial interface that operates at
clock rates up to 35 MHz and that is compatible with standard
SPI, QSPI™, MICROWIRE™, and DSP interface standards. The
part incorporates a power-on reset circuit that ensures the DAC
output powers up to 0 V and in a known output impedance
state and remains in this state until a valid write to the device
takes place. The part provides an output clamp feature that
places the output in a defined load state.
PRODUCT HIGHLIGHTS
1. 1 ppm Accuracy.
2. Wide Power Supply Range up to ±16.5 V.
3. Operating Temperature Range: −40°C to +125°C.
4. Low 7.5 nV/√Hz Noise Spectral Density.
5. Low 0.05 ppm/°C Temperature Drift.
1 Protected by U.S. Patent No. 7,884,747. Other patents pending.
Rev. D
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2010–2013 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
1 page  
AD5791
Data Sheet
Parameter
Midscale Glitch Impulse8
MSB Segment Glitch Impulse8
Output Enabled Glitch Impulse
Digital Feedthrough
DC Output Impedance (Normal Mode)
DC Output Impedance (Output Clamped
to Ground)
Spurious Free Dynamic Range
Total Harmonic Distortion
REFERENCE INPUTS3
VREFP Input Range
VREFN Input Range
DC Input Impedance
Input Capacitance
LOGIC INPUTS3
Input Current9
Input Low Voltage, VIL
Input High Voltage, VIH
Pin Capacitance
LOGIC OUTPUT (SDO)3
Output Low Voltage, VOL
Output High Voltage, VOH
High Impedance Leakage Current
High Impedance Output Capacitance
POWER REQUIREMENTS
VDD
VSS
VCC
IOVCC
IDD
ISS
ICC
IOICC
DC Power Supply Rejection Ratio3, 10
AC Power Supply Rejection Ratio3
A, B Version1
Min Typ Max
3.1
1.7
1.4
9.1
3.6
1.9
45
0.4
3.4
6
100
97
Unit
nV-sec
nV-sec
nV-sec
nV-sec
nV-sec
nV-sec
nV-sec
nV-sec
kΩ
kΩ
dB
dB
5 VDD − 2.5 V V
VSS + 2.5 V
0
5 6.6
kΩ
15 pF
−1
0.7 × IOVCC
5
+1
0.3 × IOVCC
µA
V
V
pF
IOVCC − 0.5 V
3
0.4
±1
V
V
µA
pF
7.5
VDD − 33
2.7
1.71
VSS + 33
−2.5
5.5
5.5
4.2 5.2
4 4.9
600 900
52 140
±0.6
±0.6
95
95
V
V
V
V
mA
mA
µA
µA
µV/V
µV/V
dB
dB
Test Conditions/Comments
VREFP = +10 V, VREFN = −10 V
VREFP = 10 V, VREFN = 0 V
VREFP = 5 V, VREFN = 0 V
VREFP = +10 V, VREFN = −10 V, see Figure 42
VREFP = 10 V, VREFN = 0 V, see Figure 43
VREFP = 5 V, VREFN = 0 V, see Figure 44
On removal of output ground clamp
1 kHz tone, 10 kHz sample rate
1 kHz tone, 10 kHz sample rate
VREFP, VREFN, code dependent,
typical at midscale code
VREFP, VREFN
IOVCC = 1.71 V to 5.5 V
IOVCC = 1.71 V to 5.5 V
IOVCC = 1.71 V to 5.5 V, sinking 1 mA
IOVCC = 1.71 V to 5.5 V, sourcing 1 mA
All digital inputs at DGND or IOVCC
IOVCC ≤ VCC
SDO disabled
VDD ± 10%, VSS = 15 V
VSS ± 10%, VDD = 15 V
VDD ± 200 mV, 50 Hz/60 Hz, VSS = −15 V
∆VSS ± 200 mV, 50 Hz/60 Hz, VDD = 15 V
1 Temperature range: −40°C to +125°C, typical at +25°C and VDD = +15 V, VSS = −15 V, VREFP = +10 V, VREFN = −10 V.
2 Performance characterized with AD8676BRZ voltage reference buffers and AD8675ARZ output buffer.
3 Guaranteed by design and characterization, not production tested.
4 Valid for all voltage reference spans.
5 Linearity error refers to both INL error and DNL error, either parameter can be expected to drift by the amount specified after the length of time specified.
6 AD5791 configured in X2 gain mode, 25 pF compensation capacitor on AD797.
7 Includes noise contribution from AD8676BRZ voltage reference buffers.
8 The AD5791 is configured in bias compensation mode with a low-pass RC filter on the output. R = 300 Ω, C = 143 pF.(total capacitance seen by the output buffer, lead
capacitance, and so forth).
9 Current flowing in an individual logic pin.
10 Includes PSRR of AD8676BRZ voltage reference buffers.
Rev. D | Page 4 of 28
5 Page 
AD5791
2.0
TA = +125°C
VREFP = +5V
TA = +25°C
1.5 TA = –40°C
VREFN = 0V
VDD = +15V
VSS = –15V
1.0
0.5
0
–0.5
–1.0
–1.5 AD8676 REFERENCE BUFFERS
AD8675 OUTPUT BUFFER
–2.0
0 200000 400000 600000
800000 1000000
DAC CODE
Figure 11. Differential Nonlinearity Error vs. DAC Code, 5 V Span
1.0
AD8676 REFERENCE BUFFERS
0.8 AD8675 OUTPUT BUFFER
VREFP = +10V
0.6 VREFN = 0V
VDD = +15V
0.4 VSS = –15V
TA = +25°C
TA = –40°C
TA = +125°C
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
0
200000
400000 600000
DAC CODE
800000 1000000
Figure 12. Differential Nonlinearity Error vs. DAC Code, ±10 V Span,
X2 Gain Mode
2.0
±10V SPAN MAX INL
+10V SPAN MAX INL
1.5
+5V SPAN MAX INL
+10V SPAN MIN INL
±10V SPAN MIN INL
+5V SPAN MIN INL
1.0
0.5
0
–0.5
–1.0
–1.5
–55
AD8676 REFERENCE BUFFERS
AD8675 OUTPUT BUFFER
VDD = +15V
VSS = –15V
–35 –15
5 25 45 65
TEMPERATURE (°C)
85 105 125
Figure 13. Integral Nonlinearity Error vs. Temperature
Data Sheet
1.0 ±10V SPAN MAX DNL +10V SPAN MAX DNL
+5V SPAN MAX DNL
±10V SPAN MIN DNL
+10V SPAN MIN DNL
+5V SPAN MIN DNL
0.5
0
–0.5
–1.0
AD8676 REFERENCE BUFFERS
AD8675 OUTPUT BUFFER
VDD = +15V
VSS = –15V
–1.5
–55 –35 –15
5 25 45 65
TEMPERATURE (°C)
85 105 125
Figure 14. Differential Nonlinearity Error vs. Temperature
0.6
0.5 INL MAX
0.4
0.3
TA = 25°C
0.2 VREFP = +10V
VREFN = –10V
0.1
AD8676 REFERENCE BUFFERS
AD8675 OUTPUT BUFFER
0
INL MIN
–0.1
–0.2
–0.3
12.5 13.0 13.5 14.0 14.5 15.0 15.5 16.0 16.5
VDD/|VSS| (V)
Figure 15. Integral Nonlinearity Error vs. Supply Voltage, ±10 V Span
1.5
INL MAX
1.0
0.5
TA = 25°C
VREFP = +5V
VREFN = 0V
AD8676 REFERENCE BUFFERS
0 AD8675 OUTPUT BUFFER
–0.5
–1.0
INL MIN
–1.5
7.5 8.5 9.5 10.5 11.5 12.5 13.5 14.5 15.5 16.5
VDD (V)
–2.5 –3.9 –5.3 –6.7 –9.1 –10.5 –12.9 –14.2 –15.5 –16.5
VSS (V)
Figure 16. Integral Nonlinearity Error vs. Supply Voltage, 5 V Span
Rev. D | Page 10 of 28
11 Page | ||
| Páginas | Total 29 Páginas | |
| PDF Descargar | [ Datasheet AD5791.PDF ] | |
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