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PDF AD5790 Data sheet ( Hoja de datos )
| Número de pieza | AD5790 | |
| Descripción | Voltage Output DAC | |
| Fabricantes | Analog Devices | |
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Data Sheet
System Ready, 20-Bit, ±2LSB INL,
Voltage Output DAC
AD5790
FEATURES
Single 20-bit voltage output DAC, ±2 LSB INL
8 nV/√Hz output noise spectral density
0.1 LSB long-term linearity error stability
±0.018 ppm/°C gain error temperature coefficient
2.5 µs output voltage settling time
3.5 nV-sec midscale glitch impulse
Integrated precision reference buffers
Operating temperature range: −40°C to +125°C
4 mm × 5 mm LFCSP package
Wide power supply range of up to ±16.5 V
35 MHz Schmitt-triggered digital interface
1.8 V compatible digital interface
APPLICATIONS
Medical instrumentation
Test and measurement
Industrial control
Scientific and aerospace instrumentation
Data acquisition systems
Digital gain and offset adjustment
Power supply control
GENERAL DESCRIPTION
The AD57901 is a single 20-bit, unbuffered voltage-output DAC
that operates from a bipolar supply of up to 33 V. The AD5790
accepts a positive reference input in the range of 5 V to VDD −
2.5 V and a negative reference input in the range of VSS + 2.5 V
to 0 V. The AD5790 offers a relative accuracy specification of
±2 LSB maximum range, and operation is guaranteed mono-
tonic with a −1 LSB to +3 LSB DNL specification.
The part uses a versatile 3-wire serial interface that operates at
clock rates of up to 35 MHz and is compatible with standard
SPI, QSPI™, MICROWIRE™, and DSP interface standards.
Reference buffers are also provided on chip. The part incorpo-
rates a power-on reset circuit that ensures the DAC output
powers up to 0 V in a known output impedance state and
remains in this state until a valid write to the device takes place.
The part provides a disable feature that places the output in a
defined load state. The part provides an output clamp feature
that places the output in a defined load state.
1 Protected by U.S. Patent No. 7,884,747 and 8,089,380.
FUNCTIONAL BLOCK DIAGRAM
VCC
VDD
VREFP
IOVCC
SDIN
SCLK
SYNC
SDO
LDAC
CLR
RESET
INPUT
SHIFT
REGISTER
AND
CONTROL
LOGIC
20
DAC 20
REG
20-BIT
DAC
6.8kΩ 6.8kΩ
A1 RFB
R1 RFB
INV
VOUT
6kΩ
POWER-ON-RESET
AND CLEAR LOGIC
AD5790
DGND
VSS AGND
VREFN
Figure 1.
Table 1. Related Devices
Part No.
Description
AD5791
20-bit, 1 LSB accurate DAC
AD5780
18-bit, ±1 LSB INL, voltage output DAC ,
buffered reference inputs
AD5781
18-bit, ±1 LSB INL, voltage Output DAC ,
unbuffered reference inputs
AD5760
16-bit, ±0.5 LSB INL, voltage Output DAC
AD5541A/AD5542A 16-bit, 1 LSB accurate 5 V DAC
PRODUCT HIGHLIGHTS
1. 20-bit resolution.
2. Wide power supply range of up to ±16.5 V.
3. −40°C to +125°C operating temperature range.
4. Low 8 nV/√Hz noise.
5. Low ±0.018 ppm/°C gain error temperature coefficient.
COMPANION PRODUCTS
Output Amplifier Buffer: AD8675, ADA4898-1, ADA4004-1
External Reference: ADR445, ADR4550
DC-to-DC Design Tool: ADIsimPower™
Additional companion products on the AD5790 product page
Rev. D
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2011-2013 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
1 page  
AD5790
Data Sheet
Parameter
Output Enabled Glitch Impulse
Digital Feedthrough
DC Output Impedance (Normal Mode)
DC Output Impedance (Output
Clamped to Ground)
REFERENCE INPUTS
VREFP Input Range
VREFN Input Range
Input Bias Current
Input Capacitance
LOGIC INPUTS
Input Current5
Input Low Voltage, VIL
Input High Voltage, VIH
Pin Capacitance
LOGIC OUTPUT (SDO)
Output Low Voltage, VOL
Output High Voltage, VOH
High Impedance Leakage Current
High Impedance Output Capacitance
POWER REQUIREMENTS
VDD
VSS
VCC
IOVCC
IDD
ISS
ICC
IOICC
DC Power Supply Rejection Ratio
AC Power Supply Rejection Ratio
B Version1
Min Typ Max
57
0.27
3.4
6
Unit
nV-sec
nV-sec
kΩ
kΩ
5
VSS + 2.5
−20
−4
−0.63
−0.63
1
−1
0.7 × IOVCC
5
IOVCC − 0.5
3
7.5
VDD − 33
2.7
1.71
10.3
−10
600
52
±7.5
±1.5
90
90
VDD − 2.5
0
+20
+4
V
V
nA
pF
+1
0.3 × IOVCC
µA
V
V
pF
0.4 V
V
±1 µA
pF
VSS + 33
−2.5
5.5
5.5
14
−14
900
140
V
V
V
V
mA
mA
µA
µA
µV/V
µV/V
dB
dB
Test Conditions/Comments
On removal of output ground clamp
TA = 0°C to 105°C
VREFP, VREFN
IOVCC = 1.71 V to 5.5 V
IOVCC = 1.71 V to 5.5 V
IOVCC = 1.71 V to 5.5 V, sinking 1 mA
IOVCC = 1.71 V to 5.5 V, sourcing 1 mA
All digital inputs at DGND or IOVCC
IOVCC ≤ VCC
SDO disabled
∆VDD ± 10%, VSS = −15 V
∆VSS ± 10%, VDD = 15 V
∆VDD ± 200 mV, 50 Hz/60 Hz, VSS = −15 V
∆VSS ± 200 mV, 50 Hz/60 Hz, VDD = 15 V
1 Temperature range: −40°C to +125°C, typical conditions: TA = +25°C, VDD = +15 V, VSS = −15 V, VREFP = +10 V, VREFN = −10 V.
2 Performance characterized with the AD8675ARZ output buffer.
3 Linearity error refers to both INL error and DNL error, either parameter can be expected to drift by the amount specified after the length of time specified.
4 The AD5790 is configured in unity-gain mode with a low-pass RC filter on the output. R = 300 Ω, C = 143 pF (total capacitance seen by the output buffer, lead
capacitance, and so forth).
5 Current flowing in an individual logic pin.
Rev. D | Page 4 of 28
5 Page 
AD5790
3.0
AD8675 OUTPUT BUFFER
TA = 25°C
2.5
2.0
VREFP = +5V
VREFN = 0V
VDD = +15V
VSS = –15V
1.5
1.0
0.5
0
–0.5
–1.0
0
200000 400000 600000 800000 1000000 1200000
DAC CODE
Figure 11. Differential Nonlinearity Error vs. DAC Code, 5 V Span
2.5
AD8675 OUTPUT BUFFER
TA = 25°C
2.0
1.5
VREFP = +5V
VREFN = 0V
VDD = +15V
VSS = –15V
1.0
0.5
0
–0.5
–1.0
0
200000 400000 600000 800000 1000000 1200000
DAC CODE
Figure 12. Differential Nonlinearity Error vs. DAC Code, 5 V Span, ×2 Gain
Mode
2.5
±10V SPAN MAX INL ±10V SPAN MIN INL
+10V SPAN MAX INL +10V SPAN MIN INL
2.0 +5V SPAN MAX INL +5V SPAN MIN INL
1.5
1.0
0.5
VDD = +15V
0 VSS = –15V
AD8675 OUTPUT BUFFER
–0.5
–1.0
–1.5
–40 –20
0
20 40 60 80 100
TEMPERATURE (°C)
Figure 13. Integral Nonlinearity Error vs. Temperature
Data Sheet
1.6
±10V SPAN MAX DNL
+10V SPAN MAX DNL
±10V SPAN MIN DNL
+10V SPAN MIN DNL
+5V SPAN MAX DNL +5V SPAN MIN DNL
1.4
1.2
1.0
0.8
0.6 VDD = +15V
VSS = –15V
0.4 AD8675 OUTPUT BUFFER
0.2
0
–0.2
–40
–20
0
20 40 60 80 100
TEMPERATURE (°C)
Figure 14. Differential Nonlinearity Error vs. Temperature
1.5
INL MAX
1.0
0.5
TA = 25°C
0 VREFP = +10V
VREFN = –10V
AD8675 OUTPUT BUFFER
–0.5
–1.0 INL MIN
–1.5
12.5 13.0 13.5 14.0 14.5 15.0 15.5 16.0 16.5
VDD/|VSS| (V)
Figure 15. Integral Nonlinearity Error vs. Supply Voltage, ±10 V Span
1.8
INL MAX
1.3
0.8
0.3 TA = 25°C
VREFP = 5V
VREFN = 0V
–0.2 AD8675 OUTPUT BUFFER
–0.7
–1.2 INL MIN
–1.7
–2.2
7.5 8.5 9.5 10.5 11.5 12.5 13.5 14.5 15.5 16.5
VDD/|VSS| (V)
Figure 16. Integral Nonlinearity Error vs. Supply Voltage, 5 V Span
Rev. D | Page 10 of 28
11 Page | ||
| Páginas | Total 29 Páginas | |
| PDF Descargar | [ Datasheet AD5790.PDF ] | |
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