Datasheet.kr   

ADP7112 데이터시트 PDF




Analog Devices에서 제조한 전자 부품 ADP7112은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


 

PDF 형식의 ADP7112 자료 제공

부품번호 ADP7112 기능
기능 CMOS LDO Linear Regulator
제조업체 Analog Devices
로고 Analog Devices 로고


ADP7112 데이터시트 를 다운로드하여 반도체의 전기적 특성과 매개변수에 대해 알아보세요.




전체 22 페이지수

미리보기를 사용할 수 없습니다

ADP7112 데이터시트, 핀배열, 회로
Data Sheet
FEATURES
Low noise: 11 µV rms independent of fixed output voltage
PSRR of 88 dB at 10 kHz, 68 dB at 100 kHz, 50 dB at 1 MHz,
VOUT = 5 V, VIN = 7 V
Input voltage range: 2.7 V to 20 V
Maximum output current: 200 mA
Initial accuracy: ±0.8%
Accuracy over line, load, and temperature
±1.8%, TJ = −40°C to +125°C
Low dropout voltage: 200 mV (typical) at a 200 mA load,
VOUT = 5 V
User-programmable soft start
Low quiescent current, IGND = 50 μA (typical) with no load
Low shutdown current
1.8 μA at VIN = 5 V
3.0 μA at VIN = 20 V
Stable with a small 2.2 µF ceramic output capacitor
Fixed output voltage options: 1.8 V, 2.5 V, 3.3 V, and 5.0 V
15 standard voltages between 1.2 V and 5.0 V are available
Adjustable output from 1.2 V to VIN – VDO, output can be
adjusted above initial set point
Precision enable
1 mm × 1.2 mm, 6-ball WLCSP
APPLICATIONS
Regulation to noise sensitive applications
ADC and DAC circuits, precision amplifiers, power for
VCO VTUNE control
Communications and infrastructure
Medical and healthcare
Industrial and instrumentation
GENERAL DESCRIPTION
The ADP7112 is a CMOS, low dropout (LDO) linear regulator
that operates from 2.7 V to 20 V and provides up to 200 mA of
output current. This high input voltage LDO is ideal for the
regulation of high performance analog and mixed-signal circuits
operating from 20 V down to 1.2 V rails. Using an advanced
proprietary architecture, the device provides high power supply
rejection, low noise, and achieves excellent line and load transient
response with a small 2.2 µF ceramic output capacitor. The
ADP7112 regulator output noise is 11 μV rms, independent of
the output voltage for the fixed options of 5 V or less.
20 V, 200 mA, Low Noise,
CMOS LDO Linear Regulator
ADP7112
TYPICAL APPLICATION CIRCUITS
VIN = 6V
CIN
2.2µF
ON
OFF
ADP7112
VIN VOUT
SENSE/ADJ
EN SS
GND
VOUT = 5V
COUT
2.2µF
CSS
1nF
Figure 1. ADP7112 with Fixed Output Voltage, 5 V
VIN = 7V
CIN
2.2µF
ON
OFF
ADP7112
VIN VOUT
SENSE/ADJ
EN SS
GND
VOUT = 6V
2kΩ
COUT
2.2µF
10kΩ
CSS
1nF
Figure 2. ADP7112 with 5 V Output Adjusted to 6 V
The ADP7112 is available in 15 fixed output voltage options.
The following voltages are available from stock: 1.2 V (adjustable),
1.8 V, 2.5 V, 3.3 V, and 5.0 V. Additional voltages available by
special order are 1.5 V, 1.85 V, 2.0 V, 2.2 V, 2.75 V, 2.8 V, 2.85 V,
3.8 V, 4.2 V, and 4.6 V.
Each fixed output voltage can be adjusted above the initial set
point with an external feedback divider. This allows the ADP7112
to provide an output voltage from 1.2 V to VIN − VDO with high
PSRR and low noise.
A user-programmable soft start with an external capacitor is
available in the ADP7112. The ADP7112 is available in a 6-ball
1 mm × 1.2 mm WLCSP, making it a very compact solution.
Rev. C
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2014–2016 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com




ADP7112 pdf, 반도체, 판매, 대치품
Data Sheet
ADP7112
SPECIFICATIONS
VIN = VOUT + 1 V or 2.7 V, whichever is greater, VOUT = 5 V, EN = VIN, IOUT = 10 mA, CIN = COUT = 2.2 µF, CSS = 0 pF, TA = 25°C for typical
specifications, TJ = −40°C to +125°C for minimum/maximum specifications, unless otherwise noted.
Table 1.
Parameter
INPUT VOLTAGE RANGE
MAXIMUM OUTPUT CURRENT
OPERATING SUPPLY CURRENT
SHUTDOWN CURRENT
OUTPUT VOLTAGE ACCURACY
Output Voltage Accuracy
LINE REGULATION
LOAD REGULATION1
SENSE INPUT BIAS CURRENT
DROPOUT VOLTAGE2
START-UP TIME3
SOFT START SOURCE CURRENT
CURRENT-LIMIT THRESHOLD4
THERMAL SHUTDOWN
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
UNDERVOLTAGE THRESHOLDS
Input Voltage Rising
Input Voltage Falling
Hysteresis
EN INPUT STANDBY
EN Input Logic High
EN Input Logic Low
EN Input Logic Hysteresis
EN INPUT PRECISION
EN Input Logic High
EN Input Logic Low
EN Input Logic Hysteresis
EN Input Leakage Current
EN Input Delay Time
OUTPUT NOISE
POWER SUPPLY REJECTION RATIO
Symbol
VIN
ILOAD_MAX
IGND
IGND-SD
Test Conditions/Comments
IOUT = 0 µA
IOUT = 10 mA
IOUT = 200 mA
EN = GND
EN = GND, VIN = 20 V
EN = GND
VOUT
∆VOUT/∆VIN
∆VOUT/∆IOUT
SENSEI-BIAS
VDROPOUT
TSTART-UP
SSI-SOURCE
ILIMIT
IOUT = 10 mA, TJ = 25°C
100 μA < IOUT < 200 mA, VIN = (VOUT + 1 V) to 20 V
VIN = (VOUT + 1 V) to 20 V
IOUT = 100 μA to 200 mA
100 μA < IOUT < 200 mA VIN = (VOUT + 1 V) to 20 V
IOUT = 10 mA
IOUT = 200 mA
VOUT = 5 V
SS = GND
TSSD
TSSD-HYS
TJ rising
UVLORISE
U V LO FALL
UVLOHYS
ENSTBY-HIGH
ENSTBY-LOW
ENSTBY-HYS
ENHIGH
ENLOW
ENHYS
IEN-LKG
tEN-DLY
OUTNOISE
PSRR
2.7 V ≤ VIN ≤ 20 V
2.7 V ≤ VIN ≤ 20 V
EN = VIN or GND
From EN rising from 0 V to VIN to 0.1 × VOUT
10 Hz to 100 kHz, all output voltage options
1 MHz, VIN = 7 V, VOUT = 5 V
100 kHz, VIN = 7 V, VOUT = 5 V
10 kHz, VIN = 7 V, VOUT = 5 V
Min Typ Max Unit
2.7 20 V
200 mA
50 140 µA
80 190 µA
180 320
µA
1.8 µA
3.0 µA
10 µA
–0.8
–1.8
–0.02
250
0.002
10
30
200
380
1.15
360
+0.8
+1.8
+0.02
0.004
1000
60
420
460
%
%
%/V
%/mA
nA
mV
mV
µs
µA
mA
150 °C
15 °C
2.69 V
2.2 V
230 mV
1.0 V
0.4 V
150 mV
1.15 1.22 1.30 V
1.06 1.12 1.18 V
100 mV
0.04 1
µA
80 μs
11 µV rms
50 dB
68 dB
88 dB
1 Based on an endpoint calculation using 100 μA and 200 mA loads. See Figure 5 for typical load regulation performance for loads less than 1 mA.
2 Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. Dropout applies only for output
voltages greater than 2.7 V.
3 Start-up time is defined as the time between the rising edge of EN to VOUT being at 90% of its nominal value.
4 Current-limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 5.0 V
output voltage is defined as the current that causes the output voltage to drop to 90% of 5.0 V or 4.5 V.
Rev. C | Page 3 of 21

4페이지










ADP7112 전자부품, 판매, 대치품
ADP7112
Data Sheet
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
BALL A1
INDICATOR
12
A VIN VOUT
B
SS
SENSE/
ADJ
C EN
GND
ADP7112
TOP VIEW
(BALL SIDE DOWN)
Not to Scale
Figure 3. Pin Configuration
Table 5. Pin Function Descriptions
Pin Mnemonic Description
A1 VIN Regulator Input Supply. Bypass VIN to GND with a 2.2 μF or greater capacitor.
B1 SS Soft Start. An external capacitor connected to this pin determines the soft start time. Leave this pin open
for a typical 380 μs start-up time. Do not ground this pin.
C1 EN The enable pin controls the operation of the LDO. Drive EN high to turn on the regulator. Drive EN low to
turn off the regulator. For automatic startup, connect EN to VIN.
A2
VOUT
Regulated Output Voltage. Bypass VOUT to GND with a 2.2 μF or greater capacitor.
B2 SENSE/ADJ Sense Input (SENSE). Connect to load.
Adjustable Model (ADJ). The adjustable model has a fixed output set to 1.2 V. The output can be set to a
voltage higher than 1.2 V by connecting an external resistor divider to the ADJ pin.
C2
GND
Ground.
Rev. C | Page 6 of 21

7페이지


구       성 총 22 페이지수
다운로드[ ADP7112.PDF 데이터시트 ]

당사 플랫폼은 키워드, 제품 이름 또는 부품 번호를 사용하여 검색할 수 있는

포괄적인 데이터시트를 제공합니다.


구매 문의
일반 IC 문의 : 샘플 및 소량 구매
-----------------------------------------------------------------------

IGBT, TR 모듈, SCR 및 다이오드 모듈을 포함한
광범위한 전력 반도체를 판매합니다.

전력 반도체 전문업체

상호 : 아이지 인터내셔날

사이트 방문 :     [ 홈페이지 ]     [ 블로그 1 ]     [ 블로그 2 ]



관련 데이터시트

부품번호상세설명 및 기능제조사
ADP7112

CMOS LDO Linear Regulator

Analog Devices
Analog Devices
ADP7118

CMOS LDO Linear Regulator

Analog Devices
Analog Devices

DataSheet.kr       |      2020   |     연락처      |     링크모음      |      검색     |      사이트맵