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부품번호 ADM7151 기능
기능 RF Linear Regulator
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ADM7151 데이터시트, 핀배열, 회로
Data Sheet
800 mA Ultralow Noise,
High PSRR, RF Linear Regulator
ADM7151
FEATURES
Input voltage range: 4.5 V to 16 V
Maximum output current: 800 mA
Adjustable output from 1.5 V to 5.1 V
Low noise
1.0 μV rms total integrated noise from 100 Hz to 100 kHz
1.6 μV rms total integrated noise from 10 Hz to 100 kHz
Noise spectral density: 1.7 nV√Hz from 10 kHz to 1 MHz
Power supply rejection ratio (PSRR) at 400 mA load
>90 dB from 1 kHz to 100 kHz, VOUT = 5 V
>60 dB at 1 MHz, VOUT = 5 V
Dropout voltage: 0.6 V at VOUT = 5 V, 800 mA load
Initial voltage accuracy: ±1%
Voltage accuracy over line, load and temperature: ±2%
Quiescent current (IGND): 4.3 mA at no load
Low shutdown current: 0.1 μA
Stable with a 10 μF ceramic output capacitor
8-lead LFCSP package and 8-lead SOIC package
APPLICATIONS
Regulated power noise sensitive applications
RF mixers, phase-locked loops (PLLs), voltage-controlled
oscillators (VCOs), and PLLs with integrated VCOs
Clock distribution circuits
Ultrasound and other imaging applications
High speed RF transceivers
High speed, 16-bit or greater ADCs
Communications and infrastructure
Cable digital-to-analog converter (DAC) drivers
GENERAL DESCRIPTION
The ADM7151 is a low dropout (LDO) linear regulator that
operates from 4.5 V to 16 V and provides up to 800 mA of output
current. Using an advanced proprietary architecture, it provides
high power supply rejection (>90 dB from 1 kHz to 1 MHz),
ultralow noise (1.7 nV√Hz from 10 kHz to 1 MHz), and excellent
line and load transient response with a 10 μF ceramic output
capacitor. The output voltage can be set to any voltage between
1.5 V and 5.1 V with two resistors.
The ADM7151 is available in two models that optimize power
dissipation and PSRR performance as a function of input and
output voltage. See Table 6 and Table 7 for selection guides.
The ADM7151 regulator output noise is 1.0 μV rms from
100 Hz to 100 kHz, and the noise spectral density is 1.7 nV/√Hz
from 10 kHz to 1 MHz.
The ADM7151 is available in 8-lead, 3 mm × 3 mm LFCSP and
8-lead SOIC packages, making it not only a very compact solution,
Rev. A
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
TYPICAL APPLICATION CIRCUIT
ADM7151-04
VIN = 6.2V
ON
CIN
10µF
OFF VBYP
CBYP
1µF
VIN
EN
BYP
VOUT
REF
REF_SENSE
VOUT = 5.0V
COUT
10µF
CREF
1µF
R1
VOUT = 1.5V × (R1 + R2)/R2
VREG
CREG
10µF
VREG
GND
R2
1k< R2 < 200k
Figure 1. ADM7151-04 with VOUT = 5 V
but also providing excellent thermal performance for applications
requiring up to 800 mA of output current in a small, low profile
footprint.
100k
10k
CBYP = 1µF
CBYP = 10µF
CBYP = 100µF
CBYP = 1mF
1k
100
10
1
0.1 1 10 100 1k 10k 100k 1M
FREQUENCY (Hz)
Figure 2. Noise Spectral Density (NSD) vs. Frequency for Various CBYP
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2013–2015 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com




ADM7151 pdf, 반도체, 판매, 대치품
Data Sheet
ADM7151
SPECIFICATIONS
VIN = 4.5 V, VOUT = 1.5 V, VREF = VREF_SENSE (unity gain), VEN = VIN, IOUT = 10 mA, CIN = COUT = CREG = 10 µF, CREF = CBYP = 1 µF. TA = 25°C
for typical specifications. TJ = −40°C to +125°C for minimum/maximum specifications,unless otherwise noted.
Table 1.
Parameter
Symbol
Test Conditions/Comments
Min Typ Max Unit
INPUT VOLTAGE RANGE
OPERATING SUPPLY CURRENT
SHUTDOWN CURRENT
OUTPUT NOISE
VIN
IGND
IIN-SD
OUTNOISE
IOUT = 0 µA
IOUT = 800 mA
VEN = GND
10 Hz to 100 kHz, independent of output voltage
100 Hz to 100 kHz, independent of output voltage
4.5
16
4.3 7.0
8.6 12
0.1 3
1.6
1.0
V
mA
mA
µA
µV rms
µV rms
NOISE SPECTRAL DENSITY
NSD
10 kHz to 1 MHz, independent of output voltage
1.7
nV/√Hz
POWER SUPPLY REJECTION RATIO
ADM7151-04
PSRR
ADM7151-02
VOUT VOLTAGE ACCURACY
Voltage Accuracy
VOUT
1 kHz to 100 kHz, VIN = 6.2 V, VOUT = 5 V at 800 mA
1 MHz, VIN = 6.2 V, VOUT = 5 V at 800 mA
1 kHz to 100 kHz, VIN = 6.2 V, VOUT = 5 V at 400 mA
1 MHz, VIN = 6.2 V, VOUT = 5 V at 400 mA
1 kHz to 100 kHz, VIN = 5.2 V, VOUT = 4 V at 800 mA
1 MHz, VIN = 5.2 V, VOUT = 4 V at 800 mA
1 kHz to 100 kHz, VIN = 5.2 V, VOUT = 4 V at 400 mA
1 MHz, VIN = 5.2 V, VOUT = 4 V at 400 mA
VOUT = VREF
IOUT = 10 mA
1 mA < IOUT < 800 mA, over line, load and
temperature
−1
−2
84
53
94
67
91
50
94
58
+1
+2
dB
dB
dB
dB
dB
dB
dB
dB
%
%
VOUT REGULATION
Line Regulation
Load Regulation1
CURRENT-LIMIT THRESHOLD
VREF Current Limit Threshold
VOUT Current Limit Threshold2
DROPOUT VOLTAGE3
PULL-DOWN RESISTANCE
ΔVOUT/ΔVIN
ΔVOUT/ΔIOUT
ILIMIT
VIN = 4.5 V to 16 V
IOUT = 1 mA to 800 mA
VDROPOUT
IOUT = 400 mA, VOUT = 5 V
IOUT = 800 mA, VOUT = 5 V
−0.01
+0.01 %/V
0.5 1.0 %/A
20 mA
1.0 1.3 1.6 A
0.30 0.60 V
0.60 1.20 V
VOUT Pull-Down Resistance
VREG Pull-Down Resistance
VREF Pull-Down Resistance
VBYP Pull-Down Resistance
START-UP TIME4
VOUT Start-Up Time
VREG Start-Up Time
VREF Start-Up Time
THERMAL SHUTDOWN
VOUT-PULL
VREG-PULL
VREF-PULL
VBYP-PULL
tSTART-UP
tREG-START-UP
tREF-START-UP
VEN = 0 V, VOUT = 1 V
VEN = 0 V, VREG = 1 V
VEN = 0 V, VREF = 1 V
VEN = 0 V, VBYP = 1 V
VOUT = 5 V
600 Ω
34 kΩ
800 Ω
500 Ω
2.8 ms
1.0 ms
1.8 ms
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
UNDERVOLTAGE THRESHOLDS
Input Voltage Rising
Input Voltage Falling
Hysteresis
TSSD
TSSD-HYS
UVLORISE
UVLOFALL
UVLOHYS
TJ rising
TJ = −40°C to +125°C
TJ = −40°C to +125°C
155 °C
15 °C
4.49 V
3.85 V
240 mV
Rev. A | Page 3 of 24

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ADM7151 전자부품, 판매, 대치품
ADM7151
Data Sheet
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
VREG 1
8 VIN
VOUT 2
BYP 3
GND 4
ADM7151
TOP VIEW
(Not to Scale)
7 EN
6 REF
5 REF_SENSE
NOTES
1. EXPOSED PAD ON THE BOTTOM OF THE PACKAGE.
EXPOSED PAD ENHANCES THERMAL PERFORMANCE AND IS
ELECTRICALLY CONNECTED TO GND INSIDE THE PACKAGE.
CONNECT THE EXPOSED PAD TO THE GROUND PLANE ON
THE BOARD TO ENSURE PROPER OPERATION.
Figure 3. 8-Lead LFCSP Pin Configuration
VREG 1
VOUT 2
BYP 3
GND 4
ADM7151
TOP VIEW
(Not to Scale)
8 VIN
7 EN
6 REF
5 REF_SENSE
NOTES
1. EXPOSED PAD ON THE BOTTOM OF THE PACKAGE.
EXPOSED PAD ENHANCES THERMAL PERFORMANCE AND IS
ELECTRICALLY CONNECTED TO GND INSIDE THE PACKAGE.
CONNECT THE EXPOSED PAD TO THE GROUND PLANE ON
THE BOARD TO ENSURE PROPER OPERATION.
Figure 4. 8-Lead SOIC Pin Configuration
Table 5. Pin Function Descriptions
Pin No. Mnemonic Description
1
VREG
Regulated Input Supply to LDO Amplifier. Bypass VREG to GND with a 10 μF or greater capacitor. Do not connect a
load to ground.
2
VOUT
Regulated Output Voltage. Bypass VOUT to GND with a 10 μF or greater capacitor.
3 BYP
Low Noise Bypass Capacitor. Connect a 1 μF capacitor to GND to reduce noise. Do not connect a load to ground.
4 GND Ground Connection.
5 REF_SENSE External Resistor Divider Used to Set the Output Voltage. VOUT = VREF × (R1 + R2)/R2, where VREF = 1.5 V.
6 REF
Low Noise Reference Voltage Output. Bypass REF to GND with a 1 μF capacitor. Short REF_SENSE to REF for fixed
output voltages. Do not connect a load to ground.
7 EN
Enable. Drive EN high to turn on the regulator and drive EN low to turn off the regulator. For automatic startup,
connect EN to VIN.
8 VIN
Regulator Input Supply. Bypass VIN to GND with a 10 μF or greater capacitor.
EP EP
Exposed Pad on the Bottom of the Package. Exposed pad enhances thermal performance and is electrically
connected to GND inside the package. Connect the exposed pad to the ground plane on the board to ensure
proper operation.
Rev. A | Page 6 of 24

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