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PDF AD7401A Data sheet ( Hoja de datos )
| Número de pieza | AD7401A | |
| Descripción | Isolated Sigma-Delta Modulator | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de AD7401A (archivo pdf) en la parte inferior de esta página. Total 21 Páginas | ||
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Isolated Sigma-Delta Modulator
AD7401A
FEATURES
20 MHz maximum external clock rate
Second-order modulator
16 bits, no missing codes
±2 LSB INL typical at 16 bits
1 μV/°C typical offset drift
On-board digital isolator
On-board reference
±250 mV analog input range
Low power operation: 17 mA typical at 5.5 V
−40°C to +125°C operating range
16-lead SOIC package
Internal clock version: AD7400A
Safety and regulatory approvals
UL recognition
5000 V rms for 1 minute per UL 1577
CSA Component Acceptance Notice #5A
VDE Certificate of Conformity
DIN V VDE V 0884-10 (VDE V 0884-10):2006-12
VIORM = 891 V peak
APPLICATIONS
GENERAL DESCRIPTION
The AD7401A1 is a second-order, sigma-delta (Σ-Δ) modulator
that converts an analog input signal into a high speed, 1-bit data
stream with on-chip digital isolation based on Analog Devices,
Inc., iCoupler® technology. The AD7401A operates from a 5 V
power supply and accepts a differential input signal of ±250 mV
(±320 mV full scale). The analog input is continuously sampled
by the analog modulator, eliminating the need for external
sample-and-hold circuitry. The input information is contained
in the output stream as a density of ones with a data rate up to
20 MHz. The original information can be reconstructed with
an appropriate digital filter. The serial I/O can use a 5 V or a 3 V
supply (VDD2).
The serial interface is digitally isolated. High speed CMOS,
combined with Analog Devices, Inc., iCoupler® technology ,
means the on-chip isolation provides outstanding performance
characteristics, superior to alternatives such as optocoupler
devices. The part contains an on-chip reference. The AD7401A
is offered in a 16-lead SOIC and has an operating temperature
range of −40°C to +125°C.
AC motor controls
Shunt current monitoring
Data acquisition systems
Analog-to-digital and opto-isolator replacements
FUNCTIONAL BLOCK DIAGRAM
VDD1
VDD2
VIN+
VIN–
T/H
Σ-∆ ADC
BUF
REF
CONTROL LOGIC
UPDATE
ENCODE
WATCHDOG
AD7401A
WATCHDOG
DECODE
UPDATE
MDAT
DECODE
ENCODE
MCLKIN
GND1
Figure 1.
1 Protected by U.S. Patents 5,952,849; 6,873,065; and 7,075,329. Other patents pending.
GND2
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2008–2011 Analog Devices, Inc. All rights reserved.
1 page  
AD7401A
Parameter
LOGIC OUTPUTS
Output High Voltage, VOH
Output Low Voltage, VOL
POWER REQUIREMENTS
VDD1
VDD2
IDD1 5
IDD2 6
POWER DISSIPATION (SEE Figure 17)
Y Version1, 2
Min Typ Max
VDD2 − 0.1
0.4
4.5 5.5
3 5.5
10 12
79
34
93.5
Unit Test Conditions/Comments
V IO = −200 μA
V IO = +200 μA
V
V
mA VDD1 = 5.5 V
mA VDD2 = 5.5 V
mA VDD2 = 3.3 V
MW VDD1 = VDD2 = 5.5 V
1 For fMCLK > 16 MHz to 20 MHz, mark space ratio is 48/52 to 52/48, VDD1 = VDD2 = 5 V ± 5%, and TA = −40°C to +85°C.
2 All voltages are relative to their respective ground.
3 See the Terminology section.
4 Sample tested during initial release to ensure compliance.
5 See Figure 15.
6 See Figure 17.
Rev. C | Page 4 of 20
5 Page 
AD7401A
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, using 25 kHz brick-wall filter, unless otherwise noted.
100
90
80 MCLKIN = 16MHz
70
60
50
MCLKIN = 5MHz
MCLKIN = 10MHz
40
30
20 200mV p-p SINE WAVE ON VDD1
NO DECOUPLING
10 VDD1 = VDD2 = 5V
1MHz CUTOFF FILTER
0
0 100 200 300 400 500 600 700 800
SUPPLY RIPPLE FREQUENCY (kHz)
900 1000
Figure 6. PSRR vs. Supply Ripple Frequency Without Supply Decoupling
–90
–85
–80
VDD1 = V =DD2VDD1 = VDD2 = 5 V 5V
MCLKIN = 16MHz
–75
–70 MCLKIN = 10MHz
–65 MCLKIN = 5MHz
–60
–55
–50
0
1k 2k 3k 4k 5k 6k 7k 8k 9k 10k
INPUT FREQUENCY (Hz)
Figure 7. SINAD vs. Analog Input Frequency
20
0
–20
–40
–60
–80
–100
–120
–140
–160
–180
0
4096 POINT FFT
fIN = 5kHz
SINAD = 81.984dB
THD = –96.311dB
DECIMATION BY 256
5 10 15 20 25
FREQUENCY (kHz)
Figure 8. Typical FFT (±200 mV Range)
30
–90
VDD1 = VDD2 = 5V
–85
MCLKIN = 10MHz
–80
–75 MCLKIN = 16MHz
–70
–65
–60
–55
–50
0.17 0.18 0.19 0.20 0.21 0.22 0.23 0.24 0.25 0.26 0.27 0.28 0.29 0.30 0.31 0.32 0.33
± INPUT AMPLITUDE (V)
Figure 9. SINAD vs. VIN
0.4
0.3
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4 VIN+ = –200mV TO +200mV
VIN– = 0V
–0.5
0 10k 20k
30k
CODE
40k
50k
Figure 10. Typical DNL (±200 mV Range)
60k
0.8
VIN+ = –200mV TO +200mV
VIN– = 0V
0.6
0.4
0.2
0
–0.2
–0.4
0
10k 20k 30k 40k 50k
CODE
Figure 11. Typical INL (±200 mV Range)
60k
Rev. C | Page 10 of 20
11 Page | ||
| Páginas | Total 21 Páginas | |
| PDF Descargar | [ Datasheet AD7401A.PDF ] | |
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