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ADF7030 데이터시트 PDF




Analog Devices에서 제조한 전자 부품 ADF7030은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


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부품번호 ADF7030 기능
기능 Radio Transceiver IC
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ADF7030 데이터시트, 핀배열, 회로
Data Sheet
High Performance, Low Power,
169 MHz ISM Band, Radio Transceiver IC
ADF7030
FEATURES
Host microprocessor interface
RF frequency range: 169.4 MHz to 169.6 MHz
Modulation: 2 Gaussian frequency key shifting (GFSK), 4GFSK
Data rates
2GFSK: 2.4 kbps and 4.8 kbps
4GFSK: 6.4 kbps (transmitter only)
Easy to use programming interface (SPI)
Configurable output and input interrupts
Suitable for systems targeting compliance with
ETSI EN 300 220
6 mm × 6 mm, 40-lead, standard lead LFCSP
Low power consumption
1 nA sleep current
Receiver (Rx) performance
97 dB blocking at ±10 MHz offset
93 dB blocking at ±2 MHz offset
66 dB adjacent channel rejection
−122.8 dBm sensitivity at BER = 0.1%
APPLICATIONS
Wireless M-Bus Mode N (EN 13757-4)
Smart metering
Social alarms
Active tag asset tracking
GENERAL DESCRIPTION
Transmitter (Tx) performance
The ADF7030 is a low power, high performance, integrated
2 power amplifier (PA) outputs
radio transceiver supporting narrow-band operation in the
−20 dBm to +17 dBm output power range
169.4 MHz to 169.6 MHz ISM band. The ADF7030 supports
0.1 dB output power step resolution
transmit and receive operation at 2.4 kbps and 4.8 kbps using
Very low output power variation vs. temperature and supply
2GFSK modulation and transmit operation at 6.4 kbps using
61 mA Tx current at 17 dBm
Accurate digital received signal strength indication (RSSI)
Fast settling automatic frequency control (AFC) algorithm for
very short preambles
Autonomous automatic gain control (AGC) algorithm
4GFSK modulation.
The ADF7030 features an on-chip ARM® Cortex®-M0 processor
that performs radio control and calibration, as well as packet
management.
On-chip ARM Cortex-M0 processor performs the following
functions:
Radio control
Radio calibration
Packet management
FUNCTIONAL BLOCK DIAGRAM
LDOx
TCXO BUFFER
LNA
RECEIVER
PA SYNTHESIZER
PA TRANSMITTER
DIGITAL
BASEBAND
ARM
CORTEX-M0
ROM
RAM
ADF7030
INTERRUPT
CONTROLLER
SPI
SLAVE
CONFIGURABLE
GPIOs
Figure 1.
Rev. 0
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
©2015 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com




ADF7030 pdf, 반도체, 판매, 대치품
Data Sheet
ADF7030
SPECIFICATIONS
VDD = VBAT1 = VBAT2 = VBAT3 = VBAT4 = VBAT5 = VBAT6 = 2.2 V to 3.6 V, exposed pad (EPAD) = 0 V (ground), TA = TMIN to TMAX,
unless otherwise noted. Typical specifications are at VDD = 3 V, TA = 25°C, unless otherwise noted. All VBATx pins must be tied together.
GENERAL SPECIFICATIONS
Table 1.
Parameter
TEMPERATURE RANGE, TA
VOLTAGE SUPPLY
Maximum Output Power
13 dBm
17 dBm
RF FREQUENCY
Frequency Range
Channel Frequency Resolution
REFERENCE INPUT
Frequency
Peak-to-Peak Voltage Level
Voltage Level with Respect to Ground
Duty Cycle
DATA RATE
2GFSK
2GFSK
4GFSK
FREQUENCY DEVIATION
2GFSK
4GFSK
GAUSSIAN FILTER BANDWIDTH TIME (BT) PRODUCT
Min
−40
2.2
2.8
169.4
0.8
−0.1
40
Typ
1
26
2.4
4.8
6.4
2.4
3.2
0.5
Max Unit
+85 °C
3.6
3.6
169.6
V
V
MHz
Hz
MHz
1.8 V
+1.9 V
60 %
kbps
kbps
kbps
kHz
kHz
Test Conditions/Comments
All VBATx pins must be tied together
DC-coupled external TCXO into
HFXTALN pin, clipped sine wave
Tx only
Tx only
TRANSMITTER SPECIFICATIONS
Table 2.
Parameter
POWER AMPLIFIERS (PAs)
PA1
Transmit Power
Maximum
Minimum
Transmit Power Step Resolution
Transmit Power Variation vs.
Temperature
13 dBm
−10 dBm
Transmit Power Variation vs. VDD
13 dBm
−10 dBm
Transmit Power Accuracy
13 dBm
−10 dBm
Min
Typ Max Unit Test Conditions/Comments
13
−20
0.1
±0.15
±0.3
±0.1
±0.1
±0.3
±0.9
dBm
dBm
dB
dB
dB
dB
dB
dB
dB
From −40°C to +85°C
From VDD = 2.2 V to VDD = 3.6 V
Rev. 0 | Page 3 of 24

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ADF7030 전자부품, 판매, 대치품
ADF7030
Parameter
PER-Based Test Method
Min Typ
2.4 kbps
Adjacent Channel (±12.5 kHz)
Alternate Channel (±25 kHz)
±2 MHz
±10 MHz
4.8 kbps
Adjacent Channel (±12.5 kHz)
Alternate Channel (±25 kHz)
±2 MHz
±10 MHz
ETSI EN 300 220-1 V2.4.1 Test Method
2.4 kbps
±2 MHz
±10 MHz
4.8 kbps
±2 MHz
±10 MHz
CO-CHANNEL REJECTION
PER-Based Test Method
2.4 kbps
4.8 kbps
BER-Based Test Method
2.4 kbps
4.8 kbps
IMAGE REJECTION
RECEIVER LINEARITY
Input Third-Order Intercept (IP3)
Input Second-Order Intercept (IP2)
1 dB Compression Point (P1dB)
62
70
93
96
55
69
91
95
18
14
18
14
10
10
8
9
55
−8.5
53
−18.7
Data Sheet
Max Unit Test Conditions/Comments
Desired signal 3 dB above the input sensitivity level
(PER = 5%), CW interferer power level increased until
PER = 5%, image calibrated, AFC enabled, preamble
length = 2 bytes, sync word = 0xF672, payload length =
24 bytes, 12.5 kHz channel spacing, 2GFSK frequency
deviation = 2.4 kHz
dB
dB
dB
dB
dB
dB
dB
dB
Measured as per EN 300 220-1 V2.4.1, image calibrated,
AFC disabled, 12.5 kHz channel spacing, 2GFSK
frequency deviation = 2.4 kHz
Wanted signal level = −106.7 dBm (3 dB above the
reference sensitivity level), receiver bandwidth = 8.7 kHz
dBm
dBm
Wanted signal level = −105.8 dBm (3 dB above the
reference sensitivity level), receiver bandwidth = 10.6 kHz
dBm
dBm
dB
dB
dB
dB
dB
dBm
dBm
dBm
Desired signal 3 dB above the input sensitivity level
(PER = 5%), CW interferer power level increased until
PER = 5%, AFC enabled, preamble length = 2 bytes, sync
word = 0xF672, payload length = 24 bytes, 2GFSK
frequency deviation = 2.4 kHz
Desired signal 3 dB above the input sensitivity level (BER =
0.1%), CW interferer power level increased until BER =
0.1%, AFC disabled, 2GFSK frequency deviation = 2.4 kHz
Desired signal 3 dB above the input sensitivity level
(PER = 5%), CW interferer power level increased until
PER = 5%, AFC enabled, preamble length = 2 bytes, sync
word = 0xF672, payload length = 24 bytes, 2GFSK
frequency deviation = 2.4 kHz
Measured at maximum receiver gain
Receiver channel frequency = 169.43125 MHz, fSOURCE1 =
171.35 MHz, fSOURCE2 = 173.26875 MHz
Receiver channel frequency = 169.53125 MHz, fSOURCE1 =
171.55 MHz, fSOURCE2 = 171.63125 MHz
Receiver channel frequency = 169.43125 MHz, fSOURCE1 =
171.43125 MHz
Rev. 0 | Page 6 of 24

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