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PDF ADPD105 Data sheet ( Hoja de datos )
| Número de pieza | ADPD105 | |
| Descripción | Photometric Front Ends | |
| Fabricantes | Analog Devices | |
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Data Sheet
FEATURES
Multifunction photometric front end
Fully integrated AFE, ADC, LED drivers, and timing core
Enables best-in-class ambient light rejection capability
without the need for photodiode optical filters
Three 370 mA LED drivers
Flexible, multiple, short LED pulses per optical sample
20-bit burst accumulator enabling 20 bits per sample period
On-board sample to sample accumulator, enabling up to
27 bits per data read
Low power operation
SPI, I2C interface, and 1.8 V analog/digital core
Flexible sampling frequency ranging from 0.122 Hz to 3820 Hz
FIFO data operation
APPLICATIONS
Wearable health and fitness monitors
Clinical measurements, for example, SpO2
Industrial monitoring
Background light measurements
Photometric Front Ends
ADPD105/ADPD106/ADPD107
GENERAL DESCRIPTION
The ADPD105/ADPD106/ADPD107 are highly efficient,
photometric front ends, each with an integrated 14-bit analog-
to-digital converter (ADC) and a 20-bit burst accumulator that
works with flexible light emitting diode (LED) drivers. The
accumulator is designed to stimulate an LED and measure
the corresponding optical return signal. The data output and
functional configuration occur over a 1.8 V I2C interface on the
ADPD105 or SPI on the ADPD106 and ADPD107. The control
circuitry includes flexible LED signaling and synchronous
detection.
The analog front end (AFE) features best-in-class rejection of signal
offset and corruption due to modulated interference commonly
caused by ambient light.
Couple the ADPD105/ADPD106/ADPD107 with a low
capacitance photodiode of <100 pF for optimal performance.
The ADPD105/ADPD106/ADPD107 can be used with any LED.
The ADPD105 is available in a 2.46 mm × 1.4 mm WLCSP and a
4 mm × 4 mm LFCSP. The SPI only versions, ADPD106 and
ADPD107, are available in a 2.46 mm × 1.4 mm WLCSP.
Rev. A
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
©2017 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
1 page  
Data Sheet
ADPD105/ADPD106/ADPD107
PDC
TIME SLOT
SWITCH
PD1
PD5
PD2
PD6
PD3
PD7
PD4
PD8
AVDD
ANALOG BLOCK
AFE:
SIGNAL CONDITIONING
TIA
VBIAS
BPF
±1 INTEGRATOR
TIA
VBIAS
AFE:
SIGNAL CONDITIONING
BPF
±1 INTEGRATOR
TIA
VBIAS
TIA
VBIAS
AFE:
SIGNAL CONDITIONING
BPF
±1 INTEGRATOR
AFE:
SIGNAL CONDITIONING
BPF
±1 INTEGRATOR
DVDD
ADPD105
LFCSP
14-BIT
ADC
AFE
CONFIGURATION
A
B
SLOT
SELECT
TIME SLOT A
DATA
TIME SLOT B
DATA
DIGITAL
DATAPATH
AND
INTERFACE
CONTROL
LED3
LED2
LED1
LEDX3
LEDX2
LEDX1
VLED
LGND
LED3 DRIVER
LED2 DRIVER
LED1 DRIVER
LED3 LEVEL AND TIMING CONTROL
LED2 LEVEL AND TIMING CONTROL
LED1 LEVEL AND TIMING CONTROL
VREF
1µF
GPIO0
GPIO1
SDA
SCL
DGND
AGND
Figure 2. Block Diagram for ADPD105 LFCSP Version
Rev. A | Page 5 of 66
5 Page 
Data Sheet
ADPD105/ADPD106/ADPD107
Table 7. SPI Timing Specifications
Parameter
SPI PORT
SCLK
Frequency
Minimum Pulse Width
High
Low
CS
Setup Time
Hold Time
Pulse Width High
MOSI
Setup Time
Hold Time
MISO Output Delay
Symbol
fSCLK
tSCLKPWH
tSCLKPWL
tCSS
tCSH
tCSPWH
tMOSIS
tMOSIH
tMISOD
CS
SCLK
MOSI
tCSS
MISO
tSCLKPWH
tMOSIS
tMOSIH
Test Conditions/Comments
CS setup to SCLK rising edge
CS hold from SCLK rising edge
CS pulse width high
MOSI setup to SCLK rising edge
MOSI hold from SCLK rising edge
MISO valid output delay from SCLK
falling edge
tSCLKPWL
Figure 4. SPI Timing Diagram
Min Typ Max Unit
10 MHz
20 ns
20 ns
10 ns
10 ns
10 ns
ns
10 ns
10
20 ns
tCSH
tCSPWH
tMISOD
Rev. A | Page 11 of 66
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet ADPD105.PDF ] | |
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