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PDF ADXL343 Data sheet ( Hoja de datos )
| Número de pieza | ADXL343 | |
| Descripción | Digital MEMS Accelerometer | |
| Fabricantes | Analog Devices | |
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Data Sheet
FEATURES
Multipurpose accelerometer with 10- to 13-bit resolution for
use in a wide variety of applications
Digital output accessible via SPI (3- and 4-wire) and I2C
Built-in motion detection features make tap, double-tap,
activity, inactivity, and free-fall detection trivial
User-adjustable thresholds
Interrupts independently mappable to two interrupt pins
Low power operation down to 23 µA and embedded FIFO for
reducing overall system power
Wide supply voltage range: 2.0 V to 3.6 V
I/O voltage 1.7 V to VS
Wide operating temperature range (−40°C to +85°C)
10,000 g shock survival
Small, thin, Pb free, RoHS compliant 3 mm × 5 mm × 1 mm
LGA package
APPLICATIONS
Handsets
Gaming and pointing devices
Hard disk drive (HDD) protection
3-Axis, ±2 g/±4 g/±8 g/±16 g
Digital MEMS Accelerometer
ADXL343
GENERAL DESCRIPTION
The ADXL343 is a versatile 3-axis, digital-output, low g MEMS
accelerometer. Selectable measurement range and bandwidth, and
configurable, built-in motion detection make it suitable for sensing
acceleration in a wide variety of applications. Robustness to
10,000 g of shock and a wide temperature range (−40°C to +85°C)
enable use of the accelerometer even in harsh environments.
The ADXL343 measures acceleration with high resolution (13-bit)
measurement at up to ±16 g. Digital output data is formatted as
16-bit twos complement and is accessible through either an SPI
(3- or 4-wire) or I2C digital interface. The ADXL343 can
measure the static acceleration of gravity in tilt-sensing appli-
cations, as well as dynamic acceleration resulting from motion
or shock. Its high resolution (3.9 mg/LSB) enables measurement
of inclination changes less than 1.0°.
Several special sensing functions are provided. Activity and
inactivity sensing detect the presence or lack of motion. Tap
sensing detects single and double taps in any direction. Free-fall
sensing detects if the device is falling. These functions can be
mapped individually to either of two interrupt output pins.
An integrated memory management system with a 32-level first in,
first out (FIFO) buffer can be used to store data to minimize host
processor activity and lower overall system power consumption.
The ADXL343 is supplied in a small, thin, 3 mm × 5 mm × 1 mm,
14-terminal, plastic package.
ADXL343
FUNCTIONAL BLOCK DIAGRAM
VS VDD I/O
POWER
MANAGEMENT
3-AXIS
SENSOR
SENSE
ELECTRONICS
ADC
DIGITAL
FILTER
CONTROL
AND
INTERRUPT
LOGIC
INT1
INT2
32 LEVEL
FIFO
SERIAL I/O
SDA/SDI/SDIO
SDO/ALT
ADDRESS
SCL/SCLK
GND
CS
Figure 1.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2012 Analog Devices, Inc. All rights reserved.
1 page  
ADXL343
Data Sheet
Parameter
TEMPERATURE
Operating Temperature Range
WEIGHT
Device Weight
Test Conditions/Comments
Min Typ1
−40
30
Max Unit
+85 °C
mg
1 The typical specifications shown are for at least 68% of the population of parts and are based on the worst case of mean ±1 σ, except for 0 g output and sensitivity,
which represents the target value. For 0 g offset and sensitivity, the deviation from the ideal describes the worst case of mean ±1 σ.
2 Cross-axis sensitivity is defined as coupling between any two axes.
3 Bandwidth is the −3 dB frequency and is half the output data rate, bandwidth = ODR/2.
4 The output format for the 3200 Hz and 1600 Hz ODRs is different than the output format for the remaining ODRs. This difference is described in the Data Formatting of
Upper Data Rates section.
5 Output data rates below 6.25 Hz exhibit additional offset shift with increased temperature, depending on selected output data rate. Refer to the Offset Performance at
Lowest Data Rates section for details.
6 Self-test change is defined as the output (g) when the SELF_TEST bit = 1 (in the DATA_FORMAT register, Address 0x31) minus the output (g) when the SELF_TEST bit =
0. Due to device filtering, the output reaches its final value after 4 × τ when enabling or disabling self-test, where τ = 1/(data rate). The part must be in normal power
operation (LOW_POWER bit = 0 in the BW_RATE register, Address 0x2C) for self-test to operate correctly.
7 Turn-on and wake-up times are determined by the user-defined bandwidth. At a 100 Hz data rate, the turn-on and wake-up times are each approximately 11.1 ms. For
other data rates, the turn-on and wake-up times are each approximately τ + 1.1 in milliseconds, where τ = 1/(data rate).
Rev. 0 | Page 4 of 36
5 Page 
ADXL343
160
140
120
100
80
60
40
20
0
1.60 3.12 6.25 12.50 25 50 100 200 400 800 1600 3200
OUTPUT DATA RATE (Hz)
Figure 22. Current Consumption vs. Output Data Rate at 25°C—10 Parts,
VS = 2.5 V
Data Sheet
200
150
100
50
0
2.0 2.4 2.8 3.2 3.6
SUPPLY VOLTAGE (V)
Figure 23. Supply Current vs. Supply Voltage, VS at 25°C
Rev. 0 | Page 10 of 36
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet ADXL343.PDF ] | |
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