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PDF ADV7622 Data sheet ( Hoja de datos )
| Número de pieza | ADV7622 | |
| Descripción | HDMI Transceiver | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de ADV7622 (archivo pdf) en la parte inferior de esta página. Total 17 Páginas | ||
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Data Sheet
FEATURES
4-input, 1-output multiplexed HDMI® transceiver
High-Bandwidth Digital Content Protection (HDCP 1.4)
HDCP repeater support
225 MHz HDMI Rx and Tx support 36-/30-/24-bit Deep Color
Supports DVI RGB graphics up to 1600 × 1200 at 60 Hz
Ultralow jitter digital PLL (100% deskew)
Quad HDMI Rx input
Format details available on all unselected ports
Adaptive equalizer for cable lengths up to 30 meters
Internal extended display identification data (EDID) RAM
EDID replication (512 bytes per port)
EDID with HDMI cable 5 V power support
5 V detect inputs
Hot plug assertion control pins
Single HDMI Tx output
EDID data extraction
Hot plug detect (HPD) input
Audio support
HDMI-compatible audio interface
Dedicated flexible audio input/output port
S/PDIF (IEC 60958-compatible) digital audio input/output
Super audio CD (SACD) with DSD input/output interface
High bit rate (HBR) audio
Dolby® TrueHD
DTS-HD Master Audio™
Full audio input and output support
General
Interrupt controller with 3 interrupt outputs
STDI (standard identification circuit)
Software libraries, driver, and application available
2-layer PCB design supported
HDMI Transceiver
ADV7622
APPLICATIONS
AVRs
HTiB
Sound bar with HDMI repeater support
HBR enabled TVs
Other repeater applications
GENERAL DESCRIPTION
The ADV7622 is a high performance, four-input, one-output,
High-Definition Multimedia Interface (HDMI) transceiver that
integrates HDMI receiver and transmitter functions with digital
audio I/Os onto one chip. It supports all HDCP repeater
functions through fully tested Analog Devices, Inc., repeater
software libraries and drivers.
The ADV7622 supports all mandatory HDMI 3D TV formats in
addition to all HDTV formats up to 1080p, 36-bit Deep Color. The
ADV7622 also features an integrated HDMI CEC controller that
supports capability, discovery, and control (CDC).
The ADV7622 offers a dedicated flexible audio output port and
a dedicated audio input port to allow for easy extraction and
insertion of audio data into and out of the HDMI stream. HDMI
audio formats, including SACD via DSD and compressed high bit
rate audio via HBR, are supported. The ADV7622 also features
an audio return channel (ARC) receiver. ARC simplifies cabling
by combining upstream audio capability in a conventional
HDMI cable.
Fabricated in an advanced CMOS process, the ADV7622 is
provided in a 144-lead, 20 mm × 20 mm, Pb-free LQFP and is
specified over the 0°C to 70°C temperature range.
Rev. D
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevicesforitsuse,nor for anyinfringementsofpatentsor other
rightsof third partiesthat may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
©2013 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
1 page  
ADV7622
Data Sheet
SPECIFICATIONS
CVDD = 1.8 V ± 5%, DVDD = 1.8 V ± 5%, DVDDIO = 3.3 V ± 5%, PVDD = 1.8 V ± 5%, TVDD = 3.3 V ± 5%, TXAVDD = 1.8 V ± 5%,
TXPVDD = 1.8 V ± 5%, TXPLVDD = 1.8 V ± 5%, TMIN to TMAX = 0°C to 70°C.
DIGITAL, HDMI, AND AC SPECIFICATIONS
Table 1.
Parameter
DIGITAL INPUTS
Input High Voltage (VIH)
Input Low Voltage (VIL)
Input Current (IIN)
Input Capacitance (CIN)
DIGITAL INPUTS (5 V TOLERANT)1
Input High Voltage (VIH)
Input Low Voltage (VIL)
Input Current (IIN)
DIGITAL OUTPUTS
Output High Voltage (VOH)
Output Low Voltage (VOL)
High Impedance Leakage Current (ILEAK)
Output Capacitance (COUT)
HDMI
TMDS Differential Pin Capacitance
AC SPECIFICATIONS
Input Specifications
Intrapair (+ to −) Differential Input Skew for
TMDS Clock Rates up to 222.75 MHz
Intrapair (+ to −) Differential Input Skew for
TMDS Clock Rates Above 222.75 MHz
Channel-to-Channel Differential Input Skew
TMDS Input Clock Range
TMDS Input Clock Jitter Tolerance
Output Specifications
TMDS Output Clock Frequency
TMDS Output Clock Duty Cycle
TMDS Output Differential Swing
Differential Output Timing
Low-to-High Transition Time
High-to-Low Transition Time
Test Conditions/Comments
Min
2
RESET, EP_MISO, ALSB, and CS pins −60
Other digital inputs
−10
2.6
−82
2.4
Typ Max
0.8
+60
+10
10
0.8
+82
0.4
10
20
0.3
Unit
V
V
µA
µA
pF
V
V
µA
V
V
µA
pF
pF
0.4 tBIT
0.15 tBIT + 112
25
0.5
ps
ps
0.2 tPIXEL + 1.78
225
0.25
ns
MHz
tBIT
20 225 MHz
48 52 %
900
1100 1200
mV
75 175
75 175
ps
ps
1 The following pins are 5 V tolerant: DDCA_SCL, DDCA_SDA, DDCB_SCL, DDCB_SDA, DDCC_SCL, DDCC_SDA, DDCD_SCL, DDCD_SDA, TXDDC_SDA, TXDDC_SCL,
HP_CTRLA, HP_CTRLB, HP_CTRLC, HP_CTRLD, HPD_ARC−, 5V_DETA, 5V_DETB, 5V_DETC, 5V_DETD, PWRDN, CEC, ARC+.
Rev. D | Page 4 of 16
5 Page 
ADV7622
Data Sheet
Pin No.
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
Mnemonic
RXC_2−
RXC_2+
HP_CTRLD
5V_DETD
DGND
DVDD
DDCD_SDA
DDCD_SCL
CVDD
CGND
RXD_C−
RXD_C+
TVDD
RXD_0−
RXD_0+
CGND
RXD_1−
RXD_1+
TVDD
RXD_2−
RXD_2+
CVDD
CGND
TXPVDD
37 TXPLVDD
38 TXGND
39 TXPGND
40 EXT_SWING
41 HPD_ARC−
42 ARC+
43 TXDDC_SDA
44 TXDDC_SCL
45 TXAVDD
46 TXGND
47 TXC−
48 TXC+
49 TXGND
50 TX0−
51 TX0+
52 TXGND
53 TX1−
54 TX1+
55 TXAVDD
Type
HDMI input
HDMI input
Digital output
Digital input
Ground
Power
Digital I/O
Digital input
Power
Ground
HDMI input
HDMI input
Power
HDMI input
HDMI input
Ground
HDMI input
HDMI input
Power
HDMI input
HDMI input
Power
Ground
Power
Power
Ground
Ground
Analog input
Analog input
Analog input
Digital I/O
Digital output
Power
Ground
HDMI output
HDMI output
Ground
HDMI output
HDMI output
Ground
HDMI output
HDMI output
Power
Description
Digital Input Channel 2 Complement of Port C in the HDMI Interface.
Digital Input Channel 2 True of Port C in the HDMI Interface.
Hot Plug Detect for Port D.
5 V Detect Pin for Port D in the HDMI Interface.
DVDD Ground.
Digital Supply Voltage (1.8 V).
HDCP Slave Serial Data Port D. DDCD_SDA is a 3.3 V input/output that is 5 V tolerant.
HDCP Slave Serial Clock Port D. DDCD_SCL is a 3.3 V input that is 5 V tolerant.
Receiver Comparator Supply Voltage (1.8 V).
TVDD and CVDD Ground.
Digital Input Clock Complement of Port D in the HDMI Interface.
Digital Input Clock True of Port D in the HDMI Interface.
Receiver Terminator Supply Voltage (3.3 V).
Digital Input Channel 0 Complement of Port D in the HDMI Interface.
Digital Input Channel 0 True of Port D in the HDMI Interface.
TVDD and CVDD Ground.
Digital Input Channel 1 Complement of Port D in the HDMI Interface.
Digital Input Channel 1 True of Port D in the HDMI Interface.
Receiver Terminator Supply Voltage (3.3 V).
Digital Input Channel 2 Complement of Port D in the HDMI Interface.
Digital Input Channel 2 True of Port D in the HDMI Interface.
Receiver Comparator Supply Voltage (1.8 V).
TVDD and CVDD Ground.
1.8 V Power Supply for Digital and I/O Power Supply. This pin supplies power to the digital
logic and I/Os. It should be filtered and as quiet as possible.
1.8 V Power Supply.
TXPVDD Ground.
TXPLVDD Ground.
This pin sets the internal reference currents. Place an 887 Ω resistor (1% tolerance) between
this pin and ground.
Hot Plug Detect Signal and Audio Return Channel Inverted Input. This pin indicates to the
interface whether the receiver is connected.
Audio Return Channel (ARC) Input (5 V Tolerant).
Serial Port Data I/O to Receiver. This pin serves as the master to the DDC bus. It supports a
5 V CMOS logic level.
Serial Port Data Clock to Receiver. This pin serves as the master clock for the DDC bus.
It supports a 5 V CMOS logic level.
1.8 V Power Supply for TMDS Outputs.
TXAVDD Ground.
Differential Clock Output. Differential clock output at the TMDS clock rate; supports TMDS
logic level.
Differential Clock Output. Differential clock output at the TMDS clock rate; supports TMDS
logic level.
TXAVDD Ground.
Differential Output Channel 0 Complement. Differential output of the red data at 10×
the pixel clock rate; supports TMDS logic level.
Differential Output Channel 0 True. Differential output of the red data at 10× the pixel
clock rate; supports TMDS logic level.
TXAVDD Ground.
Differential Output Channel 1 Complement. Differential output of the red data at 10×
the pixel clock rate; supports TMDS logic level.
Differential Output Channel 1 True. Differential output of the red data at 10× the pixel
clock rate; supports TMDS logic level.
1.8 V Power Supply for TMDS Outputs.
Rev. D | Page 10 of 16
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet ADV7622.PDF ] | |
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