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기능 4x Oversampled SDTV Video Decoder
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ADV7283 데이터시트, 핀배열, 회로
Data Sheet
10-Bit, 4× Oversampled SDTV Video Decoder
with Differential Inputs and Deinterlacer
ADV7283
FEATURES
Worldwide NTSC/PAL/SECAM color demodulation support
One 10-bit analog-to-digital converter (ADC), 4× oversampling
per channel for CVBS, Y/C, and YPrPb modes
6 analog video input channels with on-chip antialiasing
filters
Video input support for CVBS (composite), Y/C (S-Video), and
YPrPb (component)
Fully differential, pseudo differential, and single-ended
CVBS video input support
NTSC/PAL/SECAM autodetection
Up to 4 V common-mode input range solution
Excellent common-mode noise rejection capabilities
5-line adaptive 2D comb filter and CTI video enhancement
Adaptive Digital Line Length Tracking (ADLLT), signal
processing, and enhanced FIFO management provide
time-base correction (TBC) functionality
Integrated automatic gain control (AGC) with adaptive peak
white mode
Fast switching capability
Integrated interlaced-to-progressive (I2P) video output
converter (deinterlacer)
Adaptive contrast enhancement (ACE)
Down dither (8-bit to 6-bit)
Rovi® (Macrovision) copy protection detection
8-bit ITU-R BT.656 YCrCb 4:2:2 output
Full featured vertical blanking interval (VBI) data slicer with
world system teletext (WST) support
Power-down mode available
2-wire, I2C-compatible serial interface
Qualified for automotive applications
−40°C to +105°C automotive temperature grade
−40°C to +85°C industrial qualified temperature grade
32-lead, 5 mm × 5 mm, RoHS-compliant LFCSP
APPLICATIONS
Automotive infotainment
Smartphone/multimedia handsets
DVRs for video security
Media players
GENERAL DESCRIPTION
The ADV7283 is a versatile one-chip, multiformat video
decoder that automatically detects standard analog baseband
video signals compatible with worldwide NTSC, PAL, and
SECAM standards in the form of composite, S-Video, and
component video.
The ADV7283 converts the analog video signals into a YCrCb
4:2:2 video data stream that is compatible with the 8-bit ITU-R
BT.656 interface standard.
The six analog video inputs of the ADV7283 can accept single-
ended, pseudo differential, and fully differential signals.
The ADV7283 contains a deinterlacer (I2P converter) that
allows the device to output video in a progressive format.
The ADV7283 is programmed via a 2-wire, serial bidirectional
port (I2C compatible) and is fabricated in a 1.8 V CMOS
process.
The ADV7283 is provided in a space-saving LFCSP surface-
mount, RoHS-compliant package.
The ADV7283 is available in an automotive grade rated over the
−40°C to +105°C temperature range, as well as a −40°C to +85°C
temperature range, making the device ideal for both automotive
and industrial applications.
Rev. A
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility isassumed by Analog Devicesforitsuse, nor for any infringementsof patentsorother
rightsof third partiesthatmayresult fromitsuse. Specificationssubjecttochangewithout notice.No
licenseisgranted by implication or otherwiseunder any patent or patent rightsof Analog Devices.
Trademarks and registered trademarks are the property oftheir respective owners.
One Technology Way , P.O. Box 910 6, Norwood, MA 0206 2-9106 , U.S .A.
Tel: 78 1.32 9.47 00 ©2014–2016 Analog Devices, Inc. All rights reserved.
Technica l Support
www.analog.com




ADV7283 pdf, 반도체, 판매, 대치품
Data Sheet
FUNCTIONAL BLOCK DIAGRAM
XTALP
XTALN
DIFFERENTIAL
OR
SINGLE-ENDED
ANALOG VIDEO
INPUTS
AIN1
AIN2
AIN3
AIN4
AIN5
AIN6
ADV7283
CLOCK PROCESSING BLOCK
PLL ADLLT PROCESSING
AA
FILTER
AA
FILTER
AA
FILTER
AA
FILTER
10-BIT ADC
+
SHA
ADC
REFERENCE
DIGITAL
PROCESSING
BLOCK
2D COMB
VBI SLICER
COLOR
DEMOD
I2P
I2C/CONTROL
ADV7283
LLC
ACE
DOWN
DITHER
8-BIT
PIXEL DATA
P0 TO P7
INTRQ
SCLK SDATA ALSB RESET PWRDWN
NOTES
1. SHA IS A SAMPLE-AND-HOLD AMPLIFIER CIRCUIT.
Figure 1.
Rev. A | Page 3 of 21

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ADV7283 전자부품, 판매, 대치품
ADV7283
Data Sheet
ANALOG SPECIFICATIONS
AVDD, DVDD, and PVDD = 1.71 V to 1.89 V, DVDDIO = 1.62 V to 3.63 V, specified at operating temperature range, unless otherwise noted.
Specifications guaranteed by characterization.
Table 3.
Parameter
CLAMP CIRCUITRY
External Clamp Capacitor
Input Impedance
Large Clamp Source Current
Large Clamp Sink Current
Fine Clamp Source Current
Fine Clamp Sink Current
Test Conditions/Comments
Min
Typ
Max Unit
Clamps switched off
0.1 µF
10 MΩ
0.4 mA
0.4 mA
10 µA
10 µA
CLOCK AND I2C TIMING SPECIFICATIONS
AVDD, DVDD, and PVDD= 1.71 V to 1.89 V, DVDDIO = 1.62 V to 3.63 V, specified at operating temperature range, unless otherwise noted.
Specifications guaranteed by characterization.
Table 4.
Parameter
SYSTEM CLOCK AND CRYSTAL
Nominal Frequency
Frequency Stability
I2C PORT
SCLK Frequency
SCLK Minimum Pulse Width High
SCLK Minimum Pulse Width Low
Hold Time (Start Condition)
Setup Time (Start Condition)
SDATA Setup Time
SCLK and SDATA Rise Times
SCLK and SDATA Fall Times
Setup Time (Stop Condition)
RESET INPUT
RESET Pulse Width
Symbol Min
t1 0.6
t2 1.3
t3 0.6
t4 0.6
t5 100
t6
t7
t8
5
Typ Max
28.63636
±50
400
300
300
0.6
Unit
MHz
ppm
kHz
µs
µs
µs
µs
ns
ns
ns
µs
ms
SDATA
SCLK
t3 t5
t3
t6
t2
t1
t7
Figure 2. I2C Timing Diagram
t4
t8
Rev. A | Page 6 of 21

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