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PDF SSM2311 Data sheet ( Hoja de datos )
| Número de pieza | SSM2311 | |
| Descripción | Filterless High Efficiency Mono 3 W Class-D Audio Amplifier | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Filterless High Efficiency
Mono 3 W Class-D Audio Amplifier
SSM2311
FEATURES
Filterless Class-D amplifier with Σ-Δ modulation
No sync necessary when using multiple Analog Devices, Inc.,
Class-D amplifiers
3 W into 3 Ω load and 1.4 W into 8 Ω load at 5.0 V supply with
less than 10% total harmonic distortion (THD)
90% efficiency at 5.0 V, 1.4 W into 8 Ω speaker
Better than 98 dB signal-to-noise ratio (SNR)
Single-supply operation from 2.5 V to 5.5 V
20 nA ultralow shutdown current
Short-circuit and thermal protection
Available in 9-ball, 1.5 mm × 1.5 mm WLCSP
Pop-and-click suppression
Built-in resistors reduce board component count
Default fixed 18 dB or user-adjustable gain setting
APPLICATIONS
Mobile phones
MP3 players
Portable gaming
Portable electronics
Educational toys
GENERAL DESCRIPTION
The SSM2311 is a fully integrated, high efficiency, Class-D audio
amplifier. It is designed to maximize performance for mobile
phone applications. The application circuit requires a minimum
of external components and operates from a single 2.5 V to 5.5 V
supply. It is capable of delivering 3 W of continuous output power
with less than 1% THD + N driving a 3 Ω load from a 5.0 V supply.
The SSM2311 features a high efficiency, low noise modulation
scheme that does not require any external LC output filters. The
modulation continues to provide high efficiency even at low output
power. It operates with 90% efficiency at 1.4 W into 8 Ω or 85%
efficiency at 3 W into 3 Ω from a 5.0 V supply and has an SNR that
is better than 98 dB. Spread-spectrum pulse density modulation
is used to provide lower EMI-radiated emissions compared with
other Class-D architectures.
The SSM2311 has a micropower shutdown mode with a typical
shutdown current of 20 nA. Shutdown is enabled by applying a
logic low to the SD pin.
The device also includes pop-and-click suppression circuitry. This
minimizes voltage glitches at the output during turn-on and turn-
off, thus reducing audible noise on activation and deactivation.
The fully differential input of the SSM2311 provides excellent
rejection of common-mode noise on the input. Input coupling
capacitors can be omitted if the dc input common-mode voltage
is approximately VDD/2.
The default gain of SSM2311 is 18 dB, but users can reduce the gain
by using a pair of external resistors (see the Gain section).
The SSM2311 is specified over the industrial temperature range
(−40°C to +85°C). It has built-in thermal shutdown and output
short-circuit protection. It is available in a 9-ball, 1.5 mm × 1.5 mm
wafer level chip scale package (WLCSP).
22nF1 REXT
AUDIO IN+
AUDIO IN–
22nF1 REXT
SHUTDOWN
FUNCTIONAL BLOCK DIAGRAM
10µF
SSM2311 300kΩ
0.1µF
VDD
VBATT
2.5V TO 5.0V
IN+ 37.5kΩ
IN–
37.5kΩ
MODULATOR
FET
DRIVER
OUT+
OUT–
300kΩ
SD
BIAS
OSCILLATOR
POP-AND-CLICK
SUPPRESSION
GAIN =(37.53k0Ω0k+ΩREXT)
GND
1 INPUT CAPS ARE OPTIONAL IF INPUT DC COMMON-MODE
VOLTAGE IS APPROXIMATELY VDD/2.
Figure 1.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2008 Analog Devices, Inc. All rights reserved.
1 page  
SSM2311
ABSOLUTE MAXIMUM RATINGS
Absolute maximum ratings apply at 25°C, unless otherwise noted.
Table 2.
Parameter
Supply Voltage
Input Voltage
Common-Mode Input Voltage
Storage Temperature Range
Operating Temperature Range
Junction Temperature Range
Lead Temperature (Soldering, 60 sec)
Rating
6V
VDD
VDD
−65°C to +150°C
−40°C to +85°C
−65°C to +165°C
300°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 3. Thermal Resistance
Package Type
9-Ball, 1.5 mm × 1.5 mm WLCSP
PCB θJA θJB
1S0P1 162 38.5
2S0P1 76 21
Unit
°C/W
°C/W
1 Referencing the JEDEC thermal standard.
ESD CAUTION
Rev. 0 | Page 4 of 20
5 Page 
SSM2311
100
VDD = 2.5V
90
80
70 VDD = 5V
60 VDD = 3.6V
50
40
30
20
10
RL = 4Ω, 33µH
0
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4
OUTPUT POWER (W)
Figure 27. Efficiency vs. Output Power into 4 Ω
0.30
0.25
0.20
0.15
0.10
0.05
0
0
VDD = 5V
RL = 4Ω, 33µH
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2
OUTPUT POWER (W)
Figure 30. Power Dissipation vs. Output Power into 4 Ω at VDD = 5.0 V
100
90 VDD = 2.5V
80
70
60
VDD = 3.6V
50
40
30
20
10
0
VDD = 5V
RL = 3Ω, 33µH
OUTPUT POWER (W)
Figure 28. Efficiency vs. Output Power into 3 Ω
0.14
0.12
VDD = 5V
RL = 8Ω, 33µH
0.10
0.08
0.06
0.04
OUTPUT POWER (W)
Figure 29. Power Dissipation vs. Output Power into 8 Ω at VDD = 5.0 V
0.6
0.5
0.4
0.3
0.2
0.1
0
0
VDD = 5V
RL = 3Ω, 33µH
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2
OUTPUT POWER (W)
Figure 31. Power Dissipation vs. Output Power into 3 Ω at VDD = 5.0 V
0.10
0.08
0.06
0.04
0.02
0
0
VDD = 3.6V
RL = 8Ω, 33µH
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
OUTPUT POWER (W)
Figure 32. Power Dissipation vs. Output Power into 8 Ω at VDD = 3.6 V
Rev. 0 | Page 10 of 20
11 Page | ||
| Páginas | Total 21 Páginas | |
| PDF Descargar | [ Datasheet SSM2311.PDF ] | |
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