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PDF ADCMP396 Data sheet ( Hoja de datos )
| Número de pieza | ADCMP396 | |
| Descripción | Single/Dual/Quad Comparators | |
| Fabricantes | Analog Devices | |
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Data Sheet
Single/Dual/Quad Comparators with
Accurate Reference Output
ADCMP394/ADCMP395/ADCMP396
FEATURES
High accuracy reference output voltage: 1 V ± 0.9%
Single-supply voltage operation: 2.3 V to 5.5 V
Rail-to-rail common-mode input voltage range
Low input offset voltage across VCMR: 1 mV typical
Guarantees comparator output logic low from VCC = 0.9 V to
undervoltage lockout (UVLO)
Operating temperature range: −40°C to +125°C
Package types:
8-lead, narrow body SOIC (ADCMP394)
10-lead MSOP (ADCMP395)
16-lead, narrow body SOIC (ADCMP396)
APPLICATIONS
Battery management/monitoring
Power supply detection
Window comparators
Threshold detectors/discriminators
Microprocessor systems
GENERAL DESCRIPTION
The ADCMP394/ADCMP395/ADCMP396 are single/dual/quad
rail-to-rail input, low power comparator ideal for use in general-
purpose applications. These comparators operate from a supply
voltage of 2.3 V to 5.5 V and draw a minimal amount of
current. The single ADCMP394 consumes only 33.9 μA of
supply current. The dual ADCMP395 and quad ADCMP396
consumes 37.2 μA and 41.6 μA of supply current respectively.
The low voltage and low current operation of these devices
makes it ideal for battery-powered systems.
The comparators features a common-mode input voltage range
of 200 mV beyond rails, an offset voltage of 1 mV typical across
the full common-mode range, and a UVLO monitor. In addition,
the design of the comparator allows a defined output state upon
power-up. The comparator generates a logic low output if the
supply voltage is less than the UVLO threshold.
The ADCMP394/ADCMP395/ADCMP396 incorporates a 1 V ±
0.9% buffered reference voltage. The reference voltage output
can directly connect to the comparator input to serve as the trip
value for precise monitoring and detection of positive voltage. It
can also act as an offset when monitoring the negative voltage.
The ADCMP394 and ADCMP396 are available in 8-pin and 16-
lead, narrow body SOIC package, respectively. The ADCMP395
is available in a 10-lead MSOP package. The comparators are
specified to operate over the −40°C to +125°C extended
temperature range.
Rev. B
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
FUNCTIONAL BLOCK DIAGRAMS
VCC
ADCMP394
REF
REF
IN+
IN– OUT
GND
Figure 1.
VCC
REF
INA+
INA–
INB+
INB–
ADCMP395
REF
OUTA
OUTB
GND
Figure 2.
VCC
REF
INA+
INA–
INB+
INB–
INC+
INC–
IND+
IND–
ADCMP396
REF
OUTA
OUTB
OUTC
OUTD
GND
Figure 3.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2014–2016 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
1 page  
Data Sheet
ADCMP394/ADCMP395/ADCMP396
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
GND 1
NIC 2
IN+ 3
IN– 4
ADCMP394
TOP VIEW
(Not to Scale)
8 OUT
7 VCC
6 REF
5 NIC
NOTES
1. NIC = NOT INTERNALLY CONNECTED.
Figure 4. ADCMP394 Pin Configuration
Table 4. ADCMP394 Pin Function Descriptions
Pin No.
Mnemonic
Description
1
GND
Device Ground.
2, 5 NIC Not Internally Connected.
3 IN+ Comparator Noninverting Input.
4 IN− Comparator Inverting Input.
6 REF Reference Output. This pin can be used to setup the comparator threshold.
7 VCC Device Supply Input.
8 OUT Comparator Output, Open-Drain.
OUTA 1
VCC 2
INA– 3
INA+ 4
NIC 5
10 OUTB
ADCMP395
TOP VIEW
(Not to Scale)
9 GND
8 INB–
7 INB+
6 REF
NIC = NOT INTERNALLY CONNECTED.
Figure 5. ADCMP395 Pin Configuration
Table 5. ADCMP395 Pin Function Descriptions
Pin No.
Mnemonic
Description
1
OUTA
Comparator A Output, Open Drain.
2 VCC Device Supply Input.
3
INA−
Comparator A Inverting Input.
4
INA+
Comparator A Noninverting Input.
5 NIC Not Internally Connected.
6 REF Reference Output. This pin can be used to set up comparator threshold.
7
INB+
Comparator B Noninverting Input.
8
INB−
Comparator B Inverting Input.
9
GND
Device Ground.
10
OUTB
Comparator B Output, Open Drain.
Rev. B | Page 5 of 18
5 Page 
Data Sheet
THEORY OF OPERATION
BASIC COMPARATOR
In its most basic configuration, a comparator can be used to
convert an analog input signal to a digital output signal (see
Figure 31). The analog signal on INx+ is compared to the
voltage on INx−, and the voltage at OUTx is either high or low,
depending on whether INx+ is at a higher or lower potential
than INx−, respectively.
VCC
V+
VIN
VREF
INx+
INx–
OUTx
VOUT
V+
VREF
0V
t
VIN
Figure 31. Basic Comparator and Input and Output Signals
RAIL-TO-RAIL INPUT (RRI)
Using a CMOS nonRRI stage (that is, a single differential pair)
limits the input voltage to approximately one gate-to-source
voltage (VGS) away from one of the supply lines. Because VGS
for normal operation is commonly more than 1 V, a single
differential pair input stage comparator greatly restricts the
allowable input voltage. This restriction can be quite limiting
with low voltage supplies. To resolve this issue, RRI stages allow
the input signal range to extend up to the supply voltage range.
In the case of the ADCMP394/ADCMP395/ADCMP396, the
inputs continue to operate 200 mV beyond the supply rails.
OPEN-DRAIN OUTPUT
The ADCMP394/ADCMP395/ADCMP396 have an open-drain
output stage that requires an external resistor to pull up to the
logic high voltage level when the output transistor is switched off.
The pull-up resistor must be large enough to avoid excessive
power dissipation, but small enough to switch logic levels
reasonably quickly when the comparator output is connected to
other digital circuitry. The rise time of the open-drain output
depends on the pull-up resistor (RPULLUP) and load capacitor (CL)
used.
The rise time can be calculated by
tR = 2.2 RPULLUP CL
(1)
ADCMP394/ADCMP395/ADCMP396
POWER-UP BEHAVIOR
On power-up, when VCC reaches 0.9 V, the ADCMP394/
ADCMP395/ADCMP396 is guaranteed to assert an output low
logic. When the voltage on the VCC pin exceeds UVLO, the
comparator inputs take control.
CROSSOVER BIAS POINT
Rail-to-rail inputs of this type of architecture in both op amps
and comparators, have a dual front-end design. PMOS devices
are inactive near the VCC rail, and NMOS devices are inactive near
GND. At some predetermined point in the common-mode range,
a crossover occurs. At this point, normally 0.8 V and VCC − 0.8 V,
the measured offset voltages change.
COMPARATOR HYSTERESIS
In noisy environments, or when the differential input amplitudes
are relatively small or slow moving, adding hysteresis (VHYST) to
the comparator is often desirable. The transfer function for a
comparator with hysteresis is shown in Figure 32. As the input
voltage approaches the threshold (0 V in Figure 32) from below
the threshold region in a positive direction, the comparator
switches from low to high when the input crosses +VHYST/2.
The new switch threshold becomes −VHYST/2. The comparator
remains in the high state until the −VHYST/2 threshold is crossed
from below the threshold region in a negative direction. In this
manner, noise or feedback output signals centered on the 0 V
input cannot cause the comparator to switch states unless it
exceeds the region bounded by ±VHYST/2.
OUTPUT
VOH
VOL
–VHYST
2
0V
+VHYSTINPUT
2
Figure 32. Comparator Hysteresis Transfer Function
Rev. B | Page 11 of 18
11 Page | ||
| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet ADCMP396.PDF ] | |
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