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PDF CYUSB3064 Data sheet ( Hoja de datos )
| Número de pieza | CYUSB3064 | |
| Descripción | MIPI CSI-2 to SuperSpeed USB Bridge Controller | |
| Fabricantes | Cypress Semiconductor | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de CYUSB3064 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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CYUSB306X
EZ-USB® CX3: MIPI CSI-2 to
SuperSpeed USB Bridge Controller
EZ-USB® CX3: MIPI CSI-2 to SuperSpeed USB Bridge Controller
Features
■ Universal Serial Bus (USB) integration
❐ USB 3.0 and USB 2.0 peripherals, compliant with USB 3.0
specification 1.0
❐ 5-Gbps USB 3.0 PHY compliant with PIPE 3.0
❐ Thirty-two physical endpoints
■ MIPI CSI-2 RX interface
❐ MIPI CSI-2 compliant (Version 1.01, Revision 0.04 – 2nd April
2009)
❐ Supports up to four data lanes (CYUSB3065 supports up to
four lanes; CYUSB3064 supports up to two lanes)
❐ Each lane supports up to 1 Gbps (CYUSB3065 supports up
to four lanes; CYUSB3064 supports up to two lanes)
❐ CCI interface for image sensor configuration
■ Supports the following video data formats:
❐ User-defined 8-bit
❐ RAW8/10/12/14
❐ YUV422 (CCIR/ITU 8/10bit), YUV444
❐ RGB888/666/565
■ Fully accessible 32-bit CPU
❐ ARM926EJ-S core with 200-MHz operation
❐ 512-KB or 256-KB embedded SRAM
■ Additional connectivity to the following peripherals:
❐ I2C master controller at 1 MHz
❐ I2S master (transmitter only) at sampling frequencies of
32 kHz, 44.1 kHz, and 48 kHz
❐ UART support of up to 4 Mbps
❐ SPI master at 33 MHz
■ Twelve GPIOs
■ Ultra-low-power in core power-down mode
■ Independent power domains for core and I/O
❐ Core operation at 1.2 V
❐ I2S, UART, and SPI operation at 1.8 to 3.3 V
❐ I2C, I/O operation at 1.8 to 3.3 V
■ 10 × 10 mm, 0.8-mm pitch Pb-free ball grid array (BGA)
package
■ EZ-USB® software development kit (SDK) for easy code
development
Applications
■ Digital video cameras
■ Digital still cameras
■ Webcams
■ Scanners
■ Video conference systems
■ Gesture-based control
■ Surveillance cameras
■ Medical imaging devices
■ Video IP phones
■ USB microscopes
■ Industrial cameras
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 001-87516 Rev. *K
• San Jose, CA 95134-1709 • 408-943-2600
Revised May 24, 2016
1 page  
CYUSB306X
Functional Overview
Cypress’s EZ-USB CX3 is the next-generation bridge controller
that can connect devices with the Mobile Industry Processor
Interface – Camera Serial Interface 2 (MIPI CSI-2) interface to
any USB 3.0 Host.
CX3 has a 4-lane CSI-2 receiver with up to 1 Gbps on each lane.
It supports video data formats such as RAW8/10/12/14, YUV422
(CCIR/ITU 8/10-bit), RGB888/666/565, and user-defined 8-bit.
CX3 has integrated the USB 3.0 and USB 2.0 physical layers
(PHYs) along with a 32-bit ARM926EJ-S microprocessor for
powerful data processing and for building custom applications.
CX3 contains 512 KB of on-chip SRAM (see Ordering
Information on page 27) for code and data. EZ-USB CX3 also
provides interfaces to connect to serial peripherals such as
UART, SPI, I2C, and I2S.
CX3 comes with application development tools. The software
development kit comes with application examples for acceler-
ating time-to-market.
CX3 complies with the USB 3.0 v1.0 specification and is also
backward compatible with USB 2.0. It also complies with the
MIPI CSI-2 v1.01, revision 0.04 specification dated 2nd April
2009.
Application Examples
In a typical application (see Figure 1), CX3 acts as the main
processor and connects to an image sensor, an audio device, or
camera control devices amongst others.
Figure 1. EZ-USB CX3 Example Application
Clock
6-40 MHz
Clock
19.2 MHz
Power
subsystem
Image
sensor
REFCLK
MIPI CSI-2
RX
CLKIN
EZ-USB CX3
VDD
U
S
B
USB
Host
I2C I2S SPI
Autofocus, Pan, Tilt, Zoom,
Shutter control, Lighting, etc.
Audio
output
Audio
input
Document Number: 001-87516 Rev. *K
Page 5 of 32
5 Page 
CYUSB306X
Table 5. Entry and Exit Methods for Low-Power Modes
Low-Power Mode
Characteristics
Methods of Entry
Methods of Exit
■ Power consumption in this mode does not
exceed ISB1
■ USB 3.0 PHY is enabled and is in U3 mode
(one of the suspend modes defined by the
USB 3.0 specification). This one block
alone is operational with its internal clock,
while all other clocks are shut down
■ D+ transitioning to low
or high
■ All I/Os maintain their previous state
■ D- transitioning to low
Suspend Mode with
USB 3.0 PHY
Enabled
■ Power supply for the wakeup source and
core power must be retained. All other
power domains can be turned on or off
individually
■ The states of the configuration registers,
buffer memory, and all internal RAM are
■ Firmware executing on
ARM926EJ-S core can put CX3 into
the suspend mode. For example, on
USB suspend condition, the firmware
may decide to put CX3 into suspend
mode
or high
■ Resume condition on
SSRX±
■ Detection of VBUS
■ Level detect on
maintained
UART_CTS
(programmable
■ All transactions must be completed before
CX3 enters suspend mode (state of
outstanding transactions are not
polarity)
■ Assertion of RESET#
preserved)
■ The firmware resumes operation from
where it was suspended (except when
woken up by RESET# assertion) because
the program counter does not reset
■ The power consumption in this mode does
not exceed ISB3
Standby Mode
■ All configuration register settings and
program/data RAM contents are
preserved. However, data in the buffers or
other parts of the data path, if any, is not
guaranteed. Therefore, the external
processor should take care that the data
needed is read before putting CX3 into the
standby mode
■ Detection of VBUS
■ The program counter is reset after waking
up from the standby mode
■ The firmware executing on
ARM926EJ-S core or external
■ Level detect on
UART_CTS
■ GPIO pins maintain their configuration
■ Internal PLL is turned off
■ USB transceiver is turned off
processor configures the appropriate (programmable
register
polarity)
■ Assertion of RESET#
■ ARM926EJ-S core is powered down.
Upon wakeup, the core re-starts and runs
the program stored in the program/data
RAM
■ Power supply for the wakeup source and
core power must be retained. All other
power domains can be turned on or off
individually
Document Number: 001-87516 Rev. *K
Page 11 of 32
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet CYUSB3064.PDF ] | |
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