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Número de pieza | CY62156ESL | |
Descripción | 8-Mbit (512 K x 16) Static RAM | |
Fabricantes | Cypress Semiconductor | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de CY62156ESL (archivo pdf) en la parte inferior de esta página. Total 16 Páginas | ||
No Preview Available ! CY62156ESL MoBL®
8-Mbit (512 K × 16) Static RAM
8-Mbit (512 K × 16) Static RAM
Features
■ High Speed: 45 ns
■ Wide voltage range: 2.2 V to 3.6 V and 4.5 V to 5.5 V
■ Ultra Low Standby Power
❐ Typical standby current: 2 A
❐ Maximum standby current: 8 A
■ Ultra Low Active Power
❐ Typical active current: 1.8 mA at f = 1 MHz
■ Easy Memory Expansion with CE1, CE2, and OE Features
■ Automatic Power Down when Deselected
■ CMOS for Optimum Speed and Power
■ Available in Pb-free 48-ball very fine-pitch ball grid array
(VFBGA) packages
Functional Description
The CY62156ESL is a high performance CMOS static RAM
organized as 512K words by 16 bits. This device features
advanced circuit design to provide ultra low active current. This
is ideal for providing More Battery Life (MoBL®) in portable
applications such as cellular telephones. The device also has an
automatic power down feature that significantly reduces power
consumption when addresses are not toggling. Place the device
in standby mode when deselected (CE1 HIGH or CE2 LOW). The
input or output pins (I/O0 through I/O15) are placed in a high
impedance state when the device is deselected (CE1 HIGH or
CE2 LOW), the outputs are disabled (OE HIGH), Byte High
Enable and Byte Low Enable are disabled (BHE, BLE HIGH), or
a write operation is active (CE1 LOW, CE2 HIGH and WE LOW).
To write to the device, take Chip Enable (CE1 LOW and CE2
HIGH) and Write Enable (WE) inputs LOW. If Byte Low Enable
(BLE) is LOW, then data from I/O pins (I/O0 through I/O7) is
written into the location specified on the address pins (A0 through
A18). If Byte High Enable (BHE) is LOW, then data from I/O pins
(I/O8 through I/O15) is written into the location specified on the
address pins (A0 through A18).
To read from the device, take Chip Enable (CE1 LOW and CE2
HIGH) and Output Enable (OE) LOW while forcing the Write
Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data
from the memory location specified by the address pins appear
on I/O0 to I/O7. If Byte High Enable (BHE) is LOW, then data from
memory appears on I/O8 to I/O15. See the Truth Table on page
11 for a complete description of read and write modes.
For a complete list of related documentation, click here.
Logic Block Diagram
A10
A9
A8
A7
AA65
A4
A3
A2
A1
A0
DATA IN DRIVERS
512 K × 16
RAM Array
I/O0–I/O7
I/O8–I/O15
COLUMN DECODER
BHE
WE
CE
OE
BLE
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 001-54995 Rev. *F
• San Jose, CA 95134-1709 • 408-943-2600
Revised November 28, 2014
1 page CY62156ESL MoBL®
Capacitance
Parameter [8]
Description
CIN
COUT
Input capacitance
Output capacitance
Thermal Resistance
Parameter [8]
Description
JA Thermal resistance
(junction to ambient)
JC Thermal resistance
(junction to case)
Test Conditions
TA = 25 °C, f = 1 MHz, VCC = VCC(typ)
Max Unit
10 pF
10 pF
Test Conditions
Still Air, soldered on a 3 × 4.5 inch, two-layer printed circuit
board
48-ball BGA
72
8.86
Unit
C/W
C/W
AC Test Loads and Waveforms
Figure 2. AC Test Loads and Waveforms
VCC
OUTPUT
R1
30 pF
INCLUDING
JIG AND
SCOPE
VCC
10%
GND
R2 Rise Time = 1 V/ns
ALL INPUT PULSES
90%
90%
10%
Fall Time = 1 V/ns
Equivalent to: THÉVENIN EQUIVALENT
OUTPUT
RTH
V TH
Parameters
R1
R2
RTH
VTH
2.5 V
16667
15385
8000
1.20
3.0 V
1103
1554
645
1.75
5.0 V
1800
990
639
1.77
Unit
V
Note
8. Tested initially and after any design or process changes that may affect these parameters.
Document Number: 001-54995 Rev. *F
Page 5 of 16
5 Page CY62156ESL MoBL®
Truth Table
CE1 CE2
HX
XL
LH
LH
LH
WE
X
X
X
H
H
L HH
L HH
L HH
L HH
LHL
LHL
LHL
OE BHE BLE
Inputs/Outputs
Mode
X X X High Z
Deselect/Power Down
X X X High Z
Deselect/Power Down
X H H High Z
Output Disabled
L L L Data Out (I/O0–I/O15)
Read
L H L Data Out (I/O0–I/O7);
High Z (I/O8–I/O15)
Read
L L H High Z (I/O0–I/O7);
Data Out (I/O8–I/O15)
Read
H L H High Z
Output Disabled
H H L High Z
Output Disabled
H L L High Z
Output Disabled
X L L Data In (I/O0–I/O15)
X H L Data In (I/O0–I/O7);
High Z (I/O8–I/O15)
X L H High Z (I/O0–I/O7);
Data In (I/O8–I/O15)
Write
Write
Write
Power
Standby (ISB)
Standby (ISB)
Active (ICC)
Active (ICC)
Active (ICC)
Active (ICC)
Active (ICC)
Active (ICC)
Active (ICC)
Active (ICC)
Active (ICC)
Active (ICC)
Document Number: 001-54995 Rev. *F
Page 11 of 16
11 Page |
Páginas | Total 16 Páginas | |
PDF Descargar | [ Datasheet CY62156ESL.PDF ] |
Número de pieza | Descripción | Fabricantes |
CY62156ESL | 8-Mbit (512 K x 16) Static RAM | Cypress Semiconductor |
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